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MC9S12XD256CAG Datasheet, PDF (603/1348 Pages) Freescale Semiconductor, Inc – MC9S12XDP512 Data Sheet | |||
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Chapter 16 Interrupt (S12XINTV1)
16.3.1.3 Interrupt Request Conï¬guration Address Register (INT_CFADDR)
Address: 0x0127
7
6
5
4
3
2
1
0
R
INT_CFADDR[7:4]
W
0
0
0
0
Reset
0
0
0
1
0
0
0
0
= Unimplemented or Reserved
Figure 16-5. Interrupt Conï¬guration Address Register (INT_CFADDR)
Read: Anytime
Write: Anytime
Table 16-5. INT_CFADDR Field Descriptions
Field
Description
7â4
Interrupt Request Conï¬guration Data Register Select Bits â These bits determine which of the 128
INT_CFADDR[7:4] conï¬guration data registers are accessible in the 8 register window at INT_CFDATA0â7. The hexadecimal
value written to this register corresponds to the upper nibble of the lower byte of the interrupt vector, i.e.,
writing 0xE0 to this register selects the conï¬guration data register block for the 8 interrupt vector requests
starting with vector (vector base + 0x00E0) to be accessible as INT_CFDATA0â7.
Note: Writing all 0s selects non-existing conï¬guration registers. In this case write accesses to
INT_CFDATA0â7 will be ignored and read accesses will return all 0.
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
603
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