MC9S12XD256CAG Datasheet, PDF (314/1348 Pages) Freescale Semiconductor, Inc – MC9S12XDP512 Data Sheet

Chapter 7 Enhanced Capture Timer (S12ECT16B8CV2)
7.3.2 Register Descriptions
This section consists of register descriptions in address order. Each description includes a standard register
diagram with an associated figure number. Details of register bit and field function follow the register
diagrams, in bit order.
Register
Name
TIOS R
W
Bit 7
IOS7
6
IOS6
5
IOS5
4
IOS4
3
IOS3
2
IOS2
1
IOS1
Bit 0
IOS0
CFORC R
W
0
FOC7
0
FOC6
0
FOC5
0
FOC4
0
FOC3
0
FOC2
0
FOC1
0
FOC0
OC7M
R
OC7M7
W
OC7M6
OC7M5
OC7M4
OC7M3
OC7M2
OC7M1 OC7M0
OC7D
R
OC7D7
W
TCNT (High) R
TCNT15
W
OC7D6
TCNT14
OC7D5
TCNT13
OC7D4
TCNT12
OC7D3
TCNT11
OC7D2
TCNT10
OC7D1
TCNT9
OC7D0
TCNT8
TCNT (Low) R
TCNT7
W
TCNT6
TCNT5
TCNT4
TCNT3
TCNT2
TCNT1
TCNT0
TSCR1 R
0
0
0
TEN
TSWAI
TSFRZ
TFFCA
PRNT
W
TTOF R
TOV7
W
TOV6
TOV5
TOV4
TOV3
TOV2
TOV1
TOV0
TCTL1 R
OM7
OL7
OM6
OL6
OM5
OL5
OM4
OL4
W
TCTL2 R
OM3
OL3
OM2
OL2
OM1
OL1
OM0
OL0
W
TCTL3
R
EDG7B
W
EDG7A
EDG6B
EDG6A
EDG5B
EDG5A
EDG4B EDG4A
TCTL4
R
EDG3B
W
EDG3A
EDG2B
EDG2A
EDG1B
EDG1A
EDG0B EDG0A
TIE
R
C7I
C6I
C5I
C4I
C3I
C2I
C1I
C0I
W
= Unimplemented or Reserved
Figure 7-2. ECT Register Summary (Sheet 1 of 5)
MC9S12XDP512 Data Sheet, Rev. 2.21
314
Freescale Semiconductor