MC9S12XD256CAG Datasheet, PDF (783/1348 Pages) Freescale Semiconductor, Inc – MC9S12XDP512 Data Sheet

Chapter 20 S12X Debug (S12XDBGV3) Module
20.4.7.4 Breakpoints Via TAGHI Or TAGLO Pin Taghits
Tagging using the external TAGHI/TAGLO pins always ends the session immediately at the tag hit. It is
always end aligned, independent of internal channel trigger alignment configuration.
20.4.7.5 Auxilliary Breakpoint Input
When this signal asserts tracing is terminated and an immediate forced breakpoints are generated,
depending on the configuration of DBGBRK bits.
20.4.7.6 S12XDBG Breakpoint Priorities
XGATE software breakpoints have the highest priority. Active tracing sessions are terminated
immediately.
If a TRIG trigger occurs after Begin or Mid aligned tracing has already been triggered by a comparator
instigated transition to Final State, then TRIG no longer has an effect. When the associated tracing session
is complete, the breakpoint occurs. Similarly if a TRIG is followed by a subsequent trigger from a
comparator channel whose BRK = 0, it has no effect, since tracing has already started.
If a comparator tag hit occurs simultaneously with an external TAGHI/TAGLO hit, the state sequencer
enters state0. TAGHI/TAGLO triggers are always end aligned, to end tracing immediately, independent of
the tracing trigger alignment bits TALIGN[1:0].
If a forced and tagged breakpoint coincide, the forced breakpoint occurs too late to prevent the tagged
instruction being loaded into the execution unit. Conversely the taghit is too late to prevent the breakpoint
request in the DBG module. Thus the S12XCPU suppresses the taghit although the tagged instruction is
executed.
Considering the code example below the forced breakpoint is requested when the location COUNTER is
accessed. This is signalled to the S12XCPU when the next (tagged) instruction (NOP) is already in the
execution stage, thus the tagged instruction is carried out but the tagged breakpoint is suppressed. Reading
the PC with BDM READ_PC returns $C008
c000 cf ff 00 START
c003 a7
c004 72 70 08
c007 a7
MARK
00
[BDM firmware commands]
c008 20 01
LDS
NOP
INC
NOP
BGND
#$FF00
COUNTER ; Forced breakpoint location = COUNTER
; Tagged opcode location = MARK
BRA END ; 1st instruction on return from BDM
20.4.7.6.1 S12XDBG Breakpoint Priorities And BDM Interfacing
Breakpoint operation is dependent on the state of the S12XBDM module. If the S12XBDM module is
active, the S12XCPU is executing out of BDM firmware and S12X breakpoints are disabled. In addition,
while executing a BDM TRACE command, tagging into BDM is disabled. If BDM is not active, the
breakpoint will give priority to BDM requests over SWI requests if the breakpoint happens to coincide
with a SWI instruction in the user’s code. On returning from BDM, the SWI from user code gets executed.
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
785