MC9S12XD256CAG Datasheet, PDF (764/1348 Pages) Freescale Semiconductor, Inc – MC9S12XDP512 Data Sheet

Chapter 20 S12X Debug (S12XDBGV3) Module
20.3.2.8.4 Debug Comparator Address Low Register (DBGXAL)
Address: 0x002B
R
W
Reset
7
Bit 7
0
6
Bit 6
0
5
Bit 5
0
4
Bit 4
0
3
Bit 3
0
2
Bit 2
0
1
Bit 1
0
0
Bit 0
0
Figure 20-17. Debug Comparator Address Low Register (DBGXAL)
Read: Anytime
Write: Anytime when S12XDBG not armed.
Table 20-31. DBGXAL Field Descriptions
Field
7–0
Bits[7:0]
Description
Comparator Address Low Compare Bits — The Comparator address low compare bits control whether the
selected comparator will compare the address bus bits [7:0] to a logic one or logic zero.
0 Compare corresponding address bit to a logic zero
1 Compare corresponding address bit to a logic one
20.3.2.8.5 Debug Comparator Data High Register (DBGXDH)
Address: 0x002C
R
W
Reset
7
Bit 15
0
6
Bit 14
0
5
Bit 13
0
4
Bit 12
0
3
Bit 11
0
2
Bit 10
0
1
Bit 9
0
0
Bit 8
0
Figure 20-18. Debug Comparator Data High Register (DBGXDH)
Read: Anytime
Write: Anytime when S12XDBG not armed.
Table 20-32. DBGXAH Field Descriptions
Field
Description
7–0
Bits[15:8]
Comparator Data High Compare Bits — The Comparator data high compare bits control whether the selected
comparator compares the data bus bits [15:8] to a logic one or logic zero. The comparator data compare bits are
only used in comparison if the corresponding data mask bit is logic 1. This register is available only for
comparators A and C.
0 Compare corresponding data bit to a logic zero
1 Compare corresponding data bit to a logic one
MC9S12XDP512 Data Sheet, Rev. 2.21
766
Freescale Semiconductor