MC9S12XD256CAG Datasheet, PDF (1330/1348 Pages) Freescale Semiconductor, Inc – MC9S12XDP512 Data Sheet

Appendix G Detailed Register Map
0x0180–0x01BF Freescale Scalable CAN — MSCAN (CAN1) Map (Sheet 3 of 3)
Address Name
R
0x019F CAN1IDMR7
W
R
0x01A0–
0x01AF
CAN1RXFG
W
0x01B0–
0x01BF
CAN1TXFG
R
W
Bit 7
AM7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
AM6
AM5
AM4
AM3
AM2
AM1
FOREGROUND RECEIVE BUFFER
(See Detailed MSCAN Foreground Receive and Transmit Buffer Layout)
FOREGROUND TRANSMIT BUFFER
(See Detailed MSCAN Foreground Receive and Transmit Buffer Layout)
Bit 0
AM0
0x01C0–0x01FF Freescale Scalable CAN — MSCAN (CAN2) Map
Address Name
Bit 7
0x01C0
0x01C1
0x01C2
0x01C3
0x01C4
0x01C5
0x01C6
0x01C7
0x01C8
0x01C9
0x01CA
0x01CB
0x01CC
0x01CD
0x01CE
0x01CF
0x01D0
R
CAN2CTL0
RXFRM
W
R
CAN2CTL1
CANE
W
R
CAN2BTR0
SJW1
W
R
CAN2BTR1
SAMP
W
R
CAN2RFLG
WUPIF
W
R
CAN2RIER
WUPIE
W
R
0
CAN2TFLG
W
R
0
CAN2TIER
W
R
0
CAN2TARQ
W
R
0
CAN2TAAK
W
R
0
CAN2TBSEL
W
R
0
CAN2IDAC
W
R
0
Reserved
W
R
0
CAN2MISC
W
R RXERR7
CAN2RXERR
W
R TXERR7
CAN2TXERR
W
R
CAN2IDAR0
AC7
W
Bit 6
RXACT
CLKSRC
SJW0
TSEG22
CSCIF
CSCIE
0
0
0
0
0
0
0
0
RXERR6
TXERR6
AC6
Bit 5
CSWAI
LOOPB
BRP5
TSEG21
RSTAT1
RSTATE1
0
0
0
0
0
IDAM1
0
0
RXERR5
TXERR5
AC5
Bit 4
SYNCH
LISTEN
BRP4
TSEG20
RSTAT0
RSTATE0
0
0
0
0
0
IDAM0
0
0
RXERR4
TXERR4
AC4
Bit 3
TIME
BORM
BRP3
TSEG13
TSTAT1
TSTATE1
0
0
0
0
0
0
0
0
RXERR3
TXERR3
AC3
Bit 2
WUPE
WUPM
BRP2
TSEG12
TSTAT0
TSTATE0
TXE2
TXEIE2
ABTRQ2
ABTAK2
TX2
IDHIT2
0
0
RXERR2
TXERR2
AC2
Bit 1
SLPRQ
SLPAK
BRP1
TSEG11
OVRIF
OVRIE
TXE1
TXEIE1
ABTRQ1
ABTAK1
TX1
IDHIT1
0
0
RXERR1
TXERR1
AC1
Bit 0
INITRQ
INITAK
BRP0
TSEG10
RXF
RXFIE
TXE0
TXEIE0
ABTRQ0
ABTAK0
TX0
IDHIT0
0
BOHOLD
RXERR0
TXERR0
AC0
1332
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor