MC9S12XD256CAG Datasheet, PDF (1318/1348 Pages) Freescale Semiconductor, Inc – MC9S12XDP512 Data Sheet

Appendix G Detailed Register Map
0x00B8–0x00BF Asynchronous Serial Interface (SCI2) Map (continued)
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
R
0x00BB SCI2CR2
TIE
TCIE
RIE
ILIE
TE
W
R TDRE
TC
RDRF
IDLE
OR
0x00BC SCI2SR1
W
R
0
0x00BD SCI2SR2
AMAP
W
0
TXPOL RXPOL
R R8
0
0
0
0x00BE SCI2DRH
T8
W
R R7
R6
R5
R4
R3
0x00BF SCI2DRL
W T7
T6
T5
T4
T3
1 _{Those registers are accessible if the AMAP bit in the SCI2SR2 register is set to zero}
2 _{Those registers are accessible if the AMAP bit in the SCI2SR2 register is set to one}
Bit 2
RE
NF
BRK13
0
R2
T2
Bit 1
RWU
FE
TXDIR
0
R1
T1
Bit 0
SBK
PF
RAF
0
R0
T0
0x00C0–0x00C7 Asynchronous Serial Interface (SCI3) Map
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
0x00C0
0x00C1
0x00C2
0x00C0
SCI3BDH¹
SCI3BDL¹
SCI3CR1¹
SCI3ASR1²
R
IREN
W
R
SBR7
W
R
LOOPS
W
R
W ^RXEDGIF
TNP1
SBR6
SCISWAI
0
TNP0
SBR5
RSRC
0
SBR12
SBR4
M
0
SBR11
SBR3
WAKE
0
0x00C1
SCI3ACR1²
R
RXEDGIE
0
0
0
0
W
0x00C2 SCI3ACR2^{2 R}
0
0
0
0
0
W
R
0x00C3 SCI3CR2
TIE
TCIE
RIE
ILIE
TE
W
R TDRE
TC
RDRF
IDLE
OR
0x00C4 SCI3SR1
W
R
0
0x00C5 SCI3SR2
AMAP
W
0
TXPOL RXPOL
R R8
0
0
0
0x00C6 SCI3DRH
T8
W
R R7
R6
R5
R4
R3
0x00C7 SCI3DRL
W T7
T6
T5
T4
T3
1 _{Those registers are accessible if the AMAP bit in the SCI3SR2 register is set to zero}
2 _{Those registers are accessible if the AMAP bit in the SCI3SR2 register is set to one}
Bit 2
SBR10
Bit 1
SBR9
SBR2
SBR1
ILT
PE
BERRV
0
BERRIF
BERRIE
BERRM1 BERRM0
RE
RWU
NF
FE
BRK13
0
TXDIR
0
R2
R1
T2
T1
Bit 0
SBR8
SBR0
PT
BKDIF
BKDIE
BKDFE
SBK
PF
RAF
0
R0
T0
1320
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor