MC9S12XD256CAG Datasheet, PDF (1067/1348 Pages) Freescale Semiconductor, Inc – MC9S12XDP512 Data Sheet

25.5 Operating Modes
Chapter 25 2 Kbyte EEPROM Module (S12XEETX2KV1)
25.5.1 Wait Mode
If a command is active (CCIF = 0) when the MCU enters the wait mode, the active command and any
buffered command will be completed.
The EEPROM module can recover the MCU from wait mode if the CBEIF and CCIF interrupts are enabled
(see Section 25.8, “Interrupts”).
25.5.2 Stop Mode
If a command is active (CCIF = 0) when the MCU enters the stop mode, the operation will be aborted and,
if the operation is program, sector erase, mass erase, or sector modify, the EEPROM array data being
programmed or erased may be corrupted and the CCIF and ACCERR flags will be set. If active, the high
voltage circuitry to the EEPROM memory will immediately be switched off when entering stop mode.
Upon exit from stop mode, the CBEIF flag is set and any buffered command will not be launched. The
ACCERR flag must be cleared before starting a command write sequence (see Section 25.4.1.2,
“Command Write Sequence”).
NOTE
As active commands are immediately aborted when the MCU enters stop
mode, it is strongly recommended that the user does not use the STOP
instruction during program, sector erase, mass erase, or sector modify
operations.
25.5.3 Background Debug Mode
In background debug mode (BDM), the EPROT register is writable. If the MCU is unsecured, then all
EEPROM commands listed in Table 25-9 can be executed. If the MCU is secured and is in special single
chip mode, the only command available to execute is mass erase.
25.6 EEPROM Module Security
The EEPROM module does not provide any security information to the MCU. After each reset, the
security state of the MCU is a function of information provided by the Flash module (see the specific FTX
Block Guide).
Freescale Semiconductor
MC9S12XDP512 Data Sheet, Rev. 2.21
1069