MC9S12XD256CAG Datasheet, PDF (192/1348 Pages) Freescale Semiconductor, Inc – MC9S12XDP512 Data Sheet

Chapter 6 XGATE (S12XGATEV2)
6.3.1.2 XGATE Channel ID Register (XGCHID)
The XGATE channel ID register (Figure 6-4) shows the identifier of the XGATE channel that is currently
active. This register will read “$00” if the XGATE module is idle. In debug mode this register can be used
to start and terminate threads (see Section 6.6.1, “Debug Features”).
7
6
5
4
3
2
1
0
R
0
XGCHID[6:0]
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 6-4. XGATE Channel ID Register (XGCHID)
Read: Anytime
Write: In Debug Mode
Table 6-2. XGCHID Field Descriptions
Field
Description
6–0
Request Identifier — ID of the currently active channel
XGCHID[6:0]
6.3.1.3 XGATE Vector Base Address Register (XGVBR)
The vector base address register (Figure 6-5 and Figure 6-6) determines the location of the XGATE vector
block.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
0
XGVBR[15:1]
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 6-5. XGATE Vector Base Address Register (XGVBR)
Read: Anytime
Write: Only if the module is disabled (XGE = 0) and idle (XGCHID = $00))
Table 6-3. XGVBR Field Descriptions
Field
Description
15–1
Vector Base Address — The XGVBR register holds the start address of the vector block in the XGATE
XBVBR[15:1] memory map.
MC9S12XDP512 Data Sheet, Rev. 2.21
192
Freescale Semiconductor