MC9S12XD256CAG Datasheet, PDF (1170/1348 Pages) Freescale Semiconductor, Inc – MC9S12XDP512 Data Sheet

Chapter 28 256 Kbyte Flash Module (S12XFTX256K2V1)
START
Read: FCLKDIV register
Clock Register
Written
Check
FDIVLD
Set?
yes
no
Write: FCLKDIV register
NOTE: FCLKDIV needs to
be set once after each reset.
Read: FSTAT register
Address, Data,
Command
Buffer Empty Check
CBEIF
no
Set?
yes
Access Error and
Protection Violation
Check
1.
ACCERR/
yes
PVIOL
Set?
no
Write: Flash Block Address
and Dummy Data
Simultaneous
Multiple Flash Block
Decision
2.
Next
yes
Flash
Block?
no
Write: FCMD register
Erase Verify Command 0x05
3.
Write: FSTAT register
Clear CBEIF 0x80
Read: FSTAT register
Write: FSTAT register
Clear ACCERR/PVIOL 0x30
Decrement Global Address
by 128K (skip unimplemented Flash)
Bit Polling for
Command Completion
Check
Erase Verify
Status
CCIF
no
Set?
yes
BLANK
no
Set?
yes
EXIT
Flash Block
Erased
EXIT
Flash Block
Not Erased
Figure 28-25. Example Erase Verify Command Flow
1172
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor