MSC8144EC Datasheet, PDF (71/80 Pages) Freescale Semiconductor, Inc – Quad Core Digital Signal Processor

Hardware Design Considerations
Table 63. Connectivity of GE1 Related Pins When only a subset of the GE1 Interface Is required (continued)
GE1_SGMII_TX
GE1_TD[0-3]
GE1_TX_CLK
GE1_TX_EN
GE1_TX_ER
Signal Name
Pin Connection
NC
NC
GND
NC
NC
3.4.4.2 Ethernet Controller 2 (GE2) Related Pins
Note: Table 65 and Table 67 assume that the alternate function of the specified pin is not used. If the alternate function is
used, connect the pin as required to support that function.
3.4.4.2.1 GE2 interface Is Not Used
Table 65 assumes that the GE2 pins are not used for any purpose (including any multiplexed function) and that V_DDGE2 is tied
to GND.
Table 64. Connectivity of GE2 Related Pins When the GE2 Interface Is Not Used
GE2_RD[0-3]
GE2_RX_CLK
GE2_RX_DV
GE2_RX_ER
GE2_SGMII_RX
GE2_SGMII_RX
GE2_SGMII_TX
GE2_SGMII_TX
GE2_TCK
GE2_TD[0–3]
GE2_TX_EN
Signal Name
Pin Connection
NC
NC
NC
NC
GND_SXC
GND_SXC
NC
NC
Nc
Nc
NC
3.4.4.2.2 Subset of GE2 Pins Required
When only a subset of the whole GE2 interface is used, such as for RMII, the unused GE2 pins should be connected as described
in Table 66. The table assumes that the unused GE2 pins are not used for any purpose (including any multiplexed functions)
and that V_DDGE2 is tied to either 2.5 V or 3.3 B.
Table 65. Connectivity of GE1 Related Pins When only a subset of the GE1 Interface Is required
Signal Name
Pin Connection
GE2_RD[0-3]
GE2_RX_CLK
GE2_RX_DV
GE2_RX_ER
GE2_SGMII_RX
GND
GND
GND
GND
GND_SXC
MSC8144EC Quad Core Digital Signal Processor Data Sheet, Rev. 6
Freescale Semiconductor
71