MSC8144EC Datasheet, PDF (43/80 Pages) Freescale Semiconductor, Inc – Quad Core Digital Signal Processor

Electrical Characteristics
2.7.5.4 Transmitter Specifications
LP-Serial transmitter electrical and timing specifications are stated in the text and tables of this section. The differential return
loss, S11, of the transmitter in each case shall be better than
• –10 dB for (baud frequency)/10 < freq(f) < 625 MHz, and
• –10 dB + 10log(f/625 MHz) dB for 625 MHz ≤ freq(f) ≤ baud frequency
The reference impedance for the differential return loss measurements is 100 Ω resistive. Differential return loss includes
contributions from internal circuitry, packaging, and any external components related to the driver. The output impedance
requirement applies to all valid output levels. It is recommended that the 20–80% rise/fall time of the transmitter, as measured
at the transmitter output, have a minimum value 60 ps in each case. It is also recommended that the timing skew at the output
of an LP-Serial transmitter between the two signals comprising a differential pair not exceed 25 ps at 1.25 GB, 20 ps at 2.50
GB, and 15 ps at 3.125 GB.
Table 30. Short Run Transmitter AC Timing Specifications—1.25 GBaud
Characteristic
Output Voltage,
Differential Output Voltage
Deterministic Jitter
Total Jitter
Multiple output skew
Unit Interval
Symbol
V_O
V_DIFFPP
J_D
J_T
S_MO
UI
Range
Min
Max
–0.40 2.30
500
1000
0.17
0.35
1000
800
800
Unit
Notes
V
mV_PP
UI_PP
UI_PP
ps
ps
Voltage relative to COMMON of either signal
comprising a differential pair
Skew at the transmitter output between lanes of a
multilane link
±100 ppm
Table 31. Short Run Transmitter AC Timing Specifications—2.5 GBaud
Characteristic
Output Voltage,
Differential Output Voltage
Deterministic Jitter
Total Jitter
Multiple Output skew
Unit Interval
Symbol
V_O
V_DIFFPP
J_D
J_T
S_MO
UI
Range
Min
Max
–0.40 2.30
500
1000
0.17
0.35
1000
400
400
Unit
Notes
V
mV_PP
UI_PP
UI_PP
ps
ps
Voltage relative to COMMON of either signal
comprising a differential pair
Skew at the transmitter output between lanes of a
multilane link
±100 ppm
Table 32. Short Run Transmitter AC Timing Specifications—3.125 GBaud
Characteristic
Output Voltage,
Differential Output Voltage
Deterministic Jitter
Total Jitter
Multiple output skew
Unit Interval
Symbol
V_O
V_DIFFPP
J_D
J_T
S_MO
UI
Range
Min
Max
-0.40 2.30
500
1000
0.17
0.35
1000
320
320
Unit
Notes
V
mV_PP
UI_PP
UI_PP
ps
ps
Voltage relative to COMMON of either signal
comprising a differential pair
Skew at the transmitter output between lanes of a
multilane link
±100 ppm
MSC8144EC Quad Core Digital Signal Processor Data Sheet, Rev. 6
Freescale Semiconductor
43