MSC8144EC Datasheet, PDF (69/80 Pages) Freescale Semiconductor, Inc – Quad Core Digital Signal Processor

Hardware Design Considerations
Table 60. Connectivity of Serial RapidIO Related Pins When Specific Lane Is Not Used (continued)
Signal Name
Pin Connection
SRIO_TXDx
SRIO_TXDx
V_DDRIOPLL
GND_RIOPLL
GND_SXP
GND_SXC
V_DDSXP
V_DDSXC
Note: The x indicates the lane number {0,1,2,3} for all unused lanes.
NC
NC
in use
in use
GND_SXP
GND_SXC
1.0 V
1.0 V
3.4.3 M3 Memory Related Pins
M3_RESET
V_25M3
V_DDM3
V_DDM3IO
Table 61. Connectivity of M3 Related Pins When M3 Memory Is Not Used
Signal Name
Pin Connection
NC
GND
GND
GND
MSC8144EC Quad Core Digital Signal Processor Data Sheet, Rev. 6
Freescale Semiconductor
69