MSC8144EC Datasheet, PDF (68/80 Pages) Freescale Semiconductor, Inc – Quad Core Digital Signal Processor

Hardware Design Considerations
3.4.1.3 ECC Unused Pin Connections
When the error code corrected mechanism is not used in any 32- or 16-bit DDR configuration, refer to Table 59 to determine
the correct pin connections.
MECC[0–7]
ECC_MDM
ECC_MDQS
ECC_MDQS
Table 58. Connectivity of Unused ECC Mechanism Pins
Signal Name
Pin connection
pull-up to V_DDDDR
NC
pull-down to GND
pull-up to V_DDDDR
3.4.2 Serial RapidIO Interface Related Pins
3.4.2.1 Serial RapidIO interface Is Not Used
Table 59. Connectivity of Serial RapidIO Interface Related Pins When the RapidIO Interface Is Not Used
SRIO_IMP_CAL_RX
SRIO_IMP_CAL_TX
SRIO_REF_CLK
SRIO_REF_CLK
SRIO_RXD[0–3]
SRIO_RXD[0–3]
SRIO_TXD[0–3]
SRIO_TXD[0–3]
V_DDRIOPLL
GND_RIOPLL
GND_SXP
GND_SXC
V_DDSXP
V_DDSXC
Signal Name
Pin Connection
GND
GND
GND
GND
GND
GND
NC
NC
GND
GND
GND
GND
GND
GND
3.4.2.2 Serial RapidIO Specific Lane Is Not Used
Table 60. Connectivity of Serial RapidIO Related Pins When Specific Lane Is Not Used
SRIO_IMP_CAL_RX
SRIO_IMP_CAL_TX
SRIO_REF_CLK
SRIO_REF_CLK
SRIO_RXDx
SRIO_RXDx
Signal Name
Pin Connection
in use
in use
in use
in use
GND_SXC
GND_SXC
MSC8144EC Quad Core Digital Signal Processor Data Sheet, Rev. 6
68
Freescale Semiconductor