MSC8144EC Datasheet, PDF (44/80 Pages) Freescale Semiconductor, Inc – Quad Core Digital Signal Processor

Electrical Characteristics
Table 33. Long Run Transmitter AC Timing Specifications—1.25 GBaud
Characteristic
Output Voltage,
Differential Output Voltage
Deterministic Jitter
Total Jitter
Multiple output skew
Unit Interval
Symbol
V_O
V_DIFFPP
J_D
J_T
S_MO
UI
Range
Min
Max
-0.40 2.30
800
1600
0.17
0.35
1000
800
800
Unit
Notes
V
mV_PP
UI_PP
UI_PP
ps
ps
Voltage relative to COMMON of either signal
comprising a differential pair
Skew at the transmitter output between lanes of a
multilane link
±100 ppm
Table 34. Long Run Transmitter AC Timing Specifications—2.5 GBaud
Characteristic
Output Voltage,
Differential Output Voltage
Deterministic Jitter
Total Jitter
Multiple output skew
Unit Interval
Symbol
V_O
V_DIFFPP
J_D
J_T
S_MO
UI
Range
Min
Max
-0.40 2.30
800
1600
0.17
0.35
1000
400
400
Unit
Notes
V
mV_PP
UI_PP
UI_PP
ps
ps
Voltage relative to COMMON of either signal
comprising a differential pair
Skew at the transmitter output between lanes of a
multilane link
±100 ppm
Table 35. Long Run Transmitter AC Timing Specifications—3.125 GBaud
Characteristic
Output Voltage,
Differential Output Voltage
Deterministic Jitter
Total Jitter
Multiple output skew
Unit Interval
Symbol
V_O
V_DIFFPP
J_D
J_T
S_MO
UI
Range
Min
Max
-0.40 2.30
800
1600
0.17
0.35
1000
320
320
Unit
Notes
V
mV_PP
UI_PP
UI_PP
ps
ps
Voltage relative to COMMON of either signal
comprising a differential pair
Skew at the transmitter output between lanes of a
multilane link
±100 ppm
For each baud rate at which an LP-Serial transmitter is specified to operate, the output eye pattern of the transmitter shall fall
entirely within the unshaded portion of the transmitter output compliance mask shown in Figure 13 with the parameters
specified in Table 36 when measured at the output pins of the device and the device is driving a 100 Ω ±5% differential resistive
load. The output eye pattern of an LP-Serial transmitter that implements pre-emphasis (to equalize the link and reduce
inter-symbol interference) need only comply with the transmitter output compliance mask when pre-emphasis is disabled or
minimized.
MSC8144EC Quad Core Digital Signal Processor Data Sheet, Rev. 6
44
Freescale Semiconductor