MSC8144EC Datasheet, PDF (45/80 Pages) Freescale Semiconductor, Inc – Quad Core Digital Signal Processor

Electrical Characteristics
V_DIFF max
V_DIFF min
0
-VDIFF min
-VDIFF max
0
A
B
1-B
1-A
Time in UI
Figure 13. Transmitter Output Compliance Mask
Table 36. Transmitter Differential Output Eye Diagram Parameters
Transmitter Type
1.25 GBaud short range
1.25 GBaud long range
2.5 GBaud short range
2.5 GBaud long range
3.125 GBaud short range
3.125 GBaud long range
V_DIFFmin (mV)
250
400
250
400
250
400
V_DIFFmax (mV)
500
800
500
800
500
800
A (UI)
0.175
0.175
0.175
0.175
0.175
0.175
1
B (UI)
0.39
0.39
0.39
0.39
0.39
0.39
2.7.5.5 Receiver Specifications
LP-Serial receiver electrical and timing specifications are stated in the text and tables of this section. Receiver input impedance
shall result in a differential return loss better that 10 dB and a common mode return loss better than 6 dB from 100 MHz to 0.8
× baud frequency. This includes contributions from internal circuitry, the package, and any external components related to the
receiver. AC coupling components are included in this requirement. The reference impedance for return loss measurements is
100 Ω resistive for differential return loss and 25 Ω resistive for common mode.
Table 37. Receiver AC Timing Specifications—1.25 GBaud
Characteristic
Symbol
Differential Input Voltage
V_IN
Deterministic Jitter Tolerance
J_D
Combined Deterministic and Random
J_DR
Jitter Tolerance
Range
Min
Max
200
1600
0.37
0.55
Unit
Notes
mV_PP
UI_PP
UI_PP
Measured at receiver
Measured at receiver
Measured at receiver
MSC8144EC Quad Core Digital Signal Processor Data Sheet, Rev. 6
Freescale Semiconductor
45