MSC8144EC Datasheet, PDF (30/80 Pages) Freescale Semiconductor, Inc – Quad Core Digital Signal Processor

Electrical Characteristics
Table 9 provides the DDR capacitance when V_DDDDR(typ) = 1.8 V.
Table 9. DDR2 SDRAM Capacitance for V_DDDDR(typ) = 1.8 V
Parameter/Condition
Symbol
Min
Max
Unit
Input/output capacitance: DQ, DQS, DQS
C_IO
6
8
pF
Delta input/output capacitance: DQ, DQS, DQS
C_DIO
—
0.5
pF
Note: This parameter is sampled. V_DDDDR = 1.8 V ± 0.090 V, f = 1 MHz, T_A = 25°C, V_OUT = V_DDDDR/2, V_OUT (peak-to-peak) = 0.2 V.
2.6.1.2 DDR (2.5V) SDRAM DC Electrical Characteristics
Table 10 provides the recommended operating conditions for the DDR SDRAM component(s) of the MSC8144EC when
V_DDDDR(typ) = 2.5 V.
Table 10. DDR SDRAM DC Electrical Characteristics for V_DDDDR (typ) = 2.5 V
Parameter/Condition
Symbol
Min
Max
Unit
I/O supply voltage¹
I/O reference voltage²
I/O termination voltage³
V_DDDDR
2.3
2.7
V
MV_REF
0.49 × V_DDDDR
0.51 × V_DDDDR
V
V_TT
MV_REF – 0.04
MV_REF + 0.04
V
Input high voltage
V_IH
MV_REF + 0.15
V_DDDDR + 0.3
V
Input low voltage
Output leakage current⁴
V_IL
–0.3
MV_REF – 0.15
V
I_OZ
–50
50
μA
Output high current (V_OUT = 1.95 V)
I_OH
–16.2
—
mA
Output low current (V_OUT = 0.35 V)
I_OL
16.2
—
mA
Notes: 1. V_DDDDR is expected to be within 50 mV of the DRAM V_DD at all times.
2. MV_REF is expected to be equal to 0.5 × V_DDDDR, and to track V_DDDDR DC variations as measured at the receiver.
Peak-to-peak noise on MV_REF may not exceed ±2% of the DC value.
3. V_TT is not applied directly to the device. It is the supply to which far end signal termination is made and is expected to be
equal to MV_REF. This rail should track variations in the DC level of V_DDDDR.
4. Output leakage is measured with all outputs are disabled, 0 V ≤ V_OUT ≤ V_DDDDR.
Table 11 provides the DDR capacitance when V_DDDDR (typ) = 2.5 V.
Table 11. DDR SDRAM Capacitance for V_DDDDR (typ) = 2.5 V
Parameter/Condition
Symbol
Min
Max
Unit
Input/output capacitance: DQ, DQS
C_IO
6
8
pF
Delta input/output capacitance: DQ, DQS
C_DIO
—
0.5
pF
Note: This parameter is sampled. V_DDDDR = 2.5 V ± 0.125 V, f = 1 MHz, T_A = 25°C, V_OUT = V_DDDDR/2, V_OUT (peak-to-peak) = 0.2 V.
Table 12 lists the current draw characteristics for MV_REF.
Table 12. Current Draw Characteristics for MV_REF
Parameter / Condition
Symbol
Min
Current draw for MV_REF
I_MVREF
—
Note: The voltage regulator for MV_REF must be able to supply up to 500 μA current.
Max
500
Unit
μA
MSC8144EC Quad Core Digital Signal Processor Data Sheet, Rev. 6
30
Freescale Semiconductor