MC908MR16CFUE Datasheet, PDF (71/282 Pages) Freescale Semiconductor, Inc – On-chip programming firmware for use with host personal computer, Clock generator module (CGM)

Acquisition/Lock Time Specifications
required to reduce the frequency error. Therefore, the slower the reference the longer it takes to make
these corrections. This parameter is also under user control via the choice of crystal frequency, f_XCLK.
Another critical parameter is the external filter capacitor. The PLL modifies the voltage on the VCO by
adding or subtracting charge from this capacitor. Therefore, the rate at which the voltage changes for a
given frequency error (thus change in charge) is proportional to the capacitor size. The size of the
capacitor also is related to the stability of the PLL. If the capacitor is too small, the PLL cannot make small
enough adjustments to the voltage and the system cannot lock. If the capacitor is too large, the PLL may
not be able to adjust the voltage in a reasonable time. See 4.8.3 Choosing a Filter Capacitor.
Also important is the operating voltage potential applied to V_DDA. The power supply potential alters the
characteristics of the PLL. A fixed value is best. Variable supplies, such as batteries, are acceptable if
they vary within a known range at very slow speeds. Noise on the power supply is not acceptable,
because it causes small frequency errors which continually change the acquisition time of the PLL.
Temperature and processing also can affect acquisition time because the electrical characteristics of the
PLL change. The part operates as specified as long as these influences stay within the specified limits.
External factors, however, can cause drastic changes in the operation of the PLL. These factors include
noise injected into the PLL through the filter capacitor filter, capacitor leakage, stray impedances on the
circuit board, and even humidity or circuit board contamination.
4.8.3 Choosing a Filter Capacitor
As described in 4.8.2 Parametric Influences on Reaction Time, the external filter capacitor, C_F, is critical
to the stability and reaction time of the PLL. The PLL is also dependent on reference frequency and supply
voltage. The value of the capacitor must, therefore, be chosen with supply potential and reference
frequency in mind. For proper operation, the external filter capacitor must be chosen according to this
equation:
C_F
=
C_FACT
⎛
⎜
⎝
V--f--_{R-D--D--D--V-A--⎠⎟⎞}
For acceptable values of C_FACT, see 4.8 Acquisition/Lock Time Specifications. For the value of V_DDA,
choose the voltage potential at which the MCU is operating. If the power supply is variable, choose a value
near the middle of the range of possible supply values.
This equation does not always yield a commonly available capacitor size, so round to the nearest
available size. If the value is between two different sizes, choose the higher value for better stability.
Choosing the lower size may seem attractive for acquisition time improvement, but the PLL can become
unstable. Also, always choose a capacitor with a tight tolerance (±20 percent or better) and low
dissipation.
4.8.4 Reaction Time Calculation
The actual acquisition and lock times can be calculated using the equations here. These equations yield
nominal values under these conditions:
• Correct selection of filter capacitor, C_F, see 4.8.3 Choosing a Filter Capacitor
• Room temperature operation
• Negligible external leakage on C_GMXFC
• Negligible noise
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
Freescale Semiconductor
71