MC908MR16CFUE Datasheet, PDF(198/282 Page) Freescale Semiconductor, Inc – On-chip programming firmware for use with host personal computer, Clock generator module (CGM)

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MC908MR16CFUE Datasheet, PDF (198/282 Pages) Freescale Semiconductor, Inc – On-chip programming firmware for use with host personal computer, Clock generator module (CGM)

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Serial Peripheral Interface Module (SPI)

Addr.

$0044

$0045

$0046

Register Name

SPI Control Register Read:

(SPCR) Write:

See page 211. Reset:

SPI Status and Control Read:

Register (SPSCR) Write:

See page 212. Reset:

SPI Data Register Read:

(SPDR) Write:

See page 214. Reset:

Bit 7

SPRIE

0

SPRF

R

0

R7

T7

R

6

5

R SPMSTR

0

ERRIE

0

R6

T6

1

OVRF

R

0

R5

T5

= Reserved

4

3

CPOL CPHA

0

1

MODF SPTE

R

R

0

1

R4

R3

T4

T3

Unaffected by reset

2

SPWOM

0

MODFEN

0

R2

T2

Figure 15-3. SPI I/O Register Summary

1

SPE

0

SPR1

0

R1

T1

Bit 0

SPTIE

0

SPR0

0

R0

T0

15.4.1 Master Mode

The SPI operates in master mode when the SPI master bit, SPMSTR, is set.

NOTE

Configure the SPI modules as master or slave before enabling them.

Enable the master SPI before enabling the slave SPI. Disable the slave SPI

before disabling the master SPI. See 15.12.1 SPI Control Register.

Only a master SPI module can initiate transmissions. Software begins the transmission from a master SPI

module by writing to the SPI data register. If the shift register is empty, the byte immediately transfers to

the shift register, setting the SPI transmitter empty bit, SPTE. The byte begins shifting out on the MOSI

pin under the control of the serial clock. See Figure 15-4.

MASTER MCU

SHIFT REGISTER

BAUD RATE

GENERATOR

MISO

MOSI

SPSCK

SS

MISO

MOSI

SPSCK

VDD

SS

SLAVE MCU

SHIFT REGISTER

Figure 15-4. Full-Duplex Master-Slave Connections

The SPR1 and SPR0 bits control the baud rate generator and determine the speed of the shift register.

See 15.12.2 SPI Status and Control Register. Through the SPSCK pin, the baud-rate generator of the

master also controls the shift register of the slave peripheral.

As the byte shifts out on the MOSI pin of the master, another byte shifts in from the slave on the masterâs

MISO pin. The transmission ends when the receiver full bit, SPRF, becomes set. At the same time that

SPRF becomes set, the byte from the slave transfers to the receive data register. In normal operation,

MC68HC908MR32 â¢ MC68HC908MR16 Data Sheet, Rev. 6.1

198

Freescale Semiconductor

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