MC908MR16CFUE Datasheet, PDF (61/282 Pages) Freescale Semiconductor, Inc – On-chip programming firmware for use with host personal computer, Clock generator module (CGM)

Functional Description
The PLL also may operate in manual mode (AUTO = 0). Manual mode is used by systems that do not
require an indicator of the lock condition for proper operation. Such systems typically operate well below
f_BUSMAX and require fast startup. These conditions apply when in manual mode:
• ACQ is a writable control bit that controls the mode of the filter. Before turning on the PLL in manual
mode, the ACQ bit must be clear.
• Before entering tracking mode (ACQ = 1), software must wait a given time, t_ACQ (see 4.8
Acquisition/Lock Time Specifications), after turning on the PLL by setting PLLON in the PLL control
register (PCTL).
• Software must wait a given time, t_AL, after entering tracking mode before selecting the PLL as the
clock source to CGMOUT (BCS = 1).
• The LOCK bit is disabled.
• CPU interrupts from the CGM are disabled.
4.3.2.4 Programming the PLL
Use this 9-step procedure to program the PLL. Table 4-1 lists the variables used and their meaning.
Table 4-1. Variable Definitions
Variable
f_BUSDES
f_VCLKDES
f_RCLK
f_VCLK
f_BUS
f_NOM
f_VRS
Definition
Desired bus clock frequency
Desired VCO clock frequency
Chosen reference crystal frequency
Calculated VCO clock frequency
Calculated bus clock frequency
Nominal VCO center frequency
Shifted FCO center frequency
1. Choose the desired bus frequency, f_BUSDES.
Example: f_BUSDES = 8 MHz
2. Calculate the desired VCO frequency, f_VCLKDES.
f_VCLKDES = 4 x f_BUSDES
Example: f_VCLKDES = 4 x 8 MHz = 32 MHz
3. Using a reference frequency, f_RCLK, equal to the crystal frequency, calculate the VCO frequency
multiplier, N. Round the result to the nearest integer.
f_VCLKDES
N=
f_RCLK
Example: N = ^{32 MHz} = 8 MHz
4 MHz
4. Calculate the VCO frequency, f_VCLK.
f_VCLK = N x f_RCLK
Example: f_VCLK = 8 x 4 MHz = 32 MHz
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
Freescale Semiconductor
61