MC908MR16CFUE Datasheet, PDF (107/282 Pages) Freescale Semiconductor, Inc – On-chip programming firmware for use with host personal computer, Clock generator module (CGM)

Figure 10-10 shows the port C I/O logic.
READ DDRC ($0006)
WRITE DDRC ($0006)
RESET
WRITE PTC ($0002)
DDRCx
PTCx
Port D
PTCx
READ PTC ($0002)
Figure 10-10. Port C I/O Circuit
When bit DDRCx is a logic 1, reading address $0002 reads the PTCx data latch. When bit DDRCx is a
logic 0, reading address $0002 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 10-3 summarizes the operation of the port C pins.
Table 10-3. Port C Pin Functions
DDRC Bit PTC Bit I/O Pin Mode
0
X⁽¹⁾
Input, Hi-Z⁽²⁾
1
X
Output
Accesses to DDRC
Read/Write
DDRC[6:0]
DDRC[6:0]
1. X = don’t care
2. Hi-Z = high impedance
3. Writing affects data register, but does not affect input.
Accesses to PTC
Read
Write
Pin
PTC[6:0]⁽³⁾
PTC[6:0]
PTC[6:0]
10.5 Port D
Port D is a 7-bit, input-only port that shares its pins with the pulse width modulator for motor control
module (PMC).
The port D data register (PTD) contains a data latch for each of the seven port pins.
Address: $0003
Bit 7
6
5
4
3
2
1
Read: 0
PTD6
PTD5
PTD4
PTD3
PTD2
PTD1
Write: R
R
R
R
R
R
R
Reset:
Unaffected by reset
R = Reserved
Figure 10-11. Port D Data Register (PTD)
Bit 0
PTD0
R
PTD[6:0] — Port D Data Bits
These read/write bits are software programmable. Reset has no effect on port D data.
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
Freescale Semiconductor
107