MC908MR16CFUE Datasheet, PDF (111/282 Pages) Freescale Semiconductor, Inc – On-chip programming firmware for use with host personal computer, Clock generator module (CGM)

Figure 10-18 shows the port F I/O logic.
READ DDRF ($000D)
WRITE DDRF ($000D)
RESET
WRITE PTF ($0009)
DDRFx
PTFx
Port F
PTFx
READ PTF ($0009)
Figure 10-18. Port F I/O Circuit
When bit DDRFx is a logic 1, reading address $0009 reads the PTFx data latch. When bit DDRFx is a
logic 0, reading address $0009 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 10-6 summarizes the operation of the port F pins.
Table 10-6. Port F Pin Functions
DDRF Bit
0
1
PTF Bit
X⁽¹⁾
X
I/O Pin Mode
Input, Hi-Z⁽²⁾
Output
Accesses to DDRF
Read/Write
DDRF[6:0]
DDRF[6:0]
1. X = don’t care
2. Hi-Z = high impedance
3. Writing affects data register, but does not affect input.
Accesses to PTF
Read
Write
Pin
PTF[6:0]⁽³⁾
PTF[6:0]
PTF[6:0]
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
Freescale Semiconductor
111