MC908MR16CFUE Datasheet, PDF (269/282 Pages) Freescale Semiconductor, Inc – On-chip programming firmware for use with host personal computer, Clock generator module (CGM)

Serial Peripheral Interface Characteristics
19.8 Serial Peripheral Interface Characteristics
Diagram
Number⁽¹⁾
Characteristic⁽²⁾
Symbol
Min
Max
Unit
Operating frequency
Master
Slave
f_OP(M)
f_OP(S)
f_OP/128
dc
f_OP/2
f_OP
MHz
Cycle time
1
Master
Slave
2
Enable lead time
3
Enable lag time
t_CYC(M)
2
128
t_CYC
t_CYC(S)
1
—
t_Lead(S)
15
—
ns
t_Lag(S)
15
—
ns
Clock (SPCK) high time
4
Master
Slave
t_SCKH(M)
100
t_SCKH(S)
50
—
ns
—
Clock (SPCK) low time
5
Master
Slave
t_SCKL(M)
100
t_SCKL(S)
50
—
ns
—
Data setup time (inputs)
6
Master
Slave
t_SU(M)
t_SU(S)
45
5
—
—
ns
Data hold time (inputs)
7
Master
Slave
t_H(M)
t_H(S)
0
15
—
—
ns
Access time, slave⁽³⁾
8
CPHA = 0
CHPA = 1
t_A(CP0)
t_A(CP1)
0
0
40
20
ns
9
Disable time, slave⁽⁴⁾
t_DIS(S)
—
25
ns
Data valid time after enable edge
10
Master
Slave⁽⁵⁾
t_V(M)
t_V(S)
—
10
ns
—
40
1. V_DD = 5.0 Vdc ± 10%, all timing is shown with respect to 20% V_DD and 70% V_DD, unless otherwise noted; assumes 100 pF
load on all SPI pins
2. Numbers refer to dimensions in Figure 19-1 and Figure 19-2.
3. Time to data active from high-impedance state
4. Hold time to high-impedance state
5. With 100 pF on all SPI pins
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
Freescale Semiconductor
269