MC908MR16CFUE Datasheet, PDF (41/282 Pages) Freescale Semiconductor, Inc – On-chip programming firmware for use with host personal computer, Clock generator module (CGM)

FLASH Memory (FLASH)
2.8.4 FLASH Program Operation
Use the following step-by-step procedure to program a row of FLASH memory. Figure 2-4 shows a
flowchart of the programming algorithm.
NOTE
Only bytes which are currently $FF may be programmed.
1. Set the PGM bit. This configures the memory for program operation and enables the latching of
address and data for programming.
2. Read the FLASH block protect register.
3. Write any data to any FLASH location within the address range desired.
4. Wait for a time, t_NVS (minimum 10 µs).
5. Set the HVEN bit.
6. Wait for a time, t_PGS (minimum 5 µs).
7. Write data to the FLASH address being programmed⁽¹⁾.
8. Wait for time, t_PROG (minimum 30 µs).
9. Repeat step 7 and 8 until all desired bytes within the row are programmed.
10. Clear the PGM bit⁽¹⁾.
11. Wait for time, t_NVH (minimum 5 µs).
12. Clear the HVEN bit.
13. After time, t_RCV (typical 1 µs), the memory can be accessed in read mode again.
NOTE
The COP register at location $FFFF should not be written between steps
5-12, when the HVEN bit is set. Since this register is located at a valid
FLASH address, unpredictable behavior may occur if this location is written
while HVEN is set.
This program sequence is repeated throughout the memory until all data is programmed.
NOTE
Programming and erasing of FLASH locations cannot be performed by
code being executed from the FLASH memory. While these operations
must be performed in the order shown, other unrelated operations may
occur between the steps. Do not exceed t_PROG maximum, see 19.6 FLASH
Memory Characteristics.
1. The time between each FLASH address change, or the time between the last FLASH address programmed to clearing PGM
bit, must not exceed the maximum programming time, t_PROG maximum.
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
Freescale Semiconductor
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