MC68HC16Z1 Datasheet, PDF (418/500 Pages) Freescale Semiconductor, Inc – M68HC16Z Series

Freescale Semiconductor, Inc.
NF — Noise Error
0 = No noise detected in the received data.
1 = Noise detected in the received data.
FE — Framing Error
0 = No framing error detected in the received data.
1 = Framing error or break detected in the received data.
PF — Parity Error
0 = No parity error detected in the received data.
1 = Parity error detected in the received data.
D.6.7 SCI Data Register
SCDR — SCI Data Register
15
RESET:
NOT USED
$YFFC0E
9
8
7
6
5
4
3
2
1
0
R8/T8 R7/T7 R6/T6 R5/T5 R4/T4 R3/T3 R2/T2 R1/T1 R0/T0
U
U
U
U
U
U
U
U
U
SCDR consists of two data registers located at the same address. The receive data
register (RDR) is a read-only register that contains data received by the SCI serial in-
terface. Data comes into the receive serial shifter and is transferred to RDR. The trans-
mit data register (TDR) is a write-only register that contains data to be transmitted.
Data is first written to TDR, then transferred to the transmit serial shifter, where addi-
tional format bits are added before transmission. R[7:0]/T[7:0] contain either the first
eight data bits received when SCDR is read, or the first eight data bits to be transmitted
when SCDR is written. R8/T8 are used when the SCI is configured for nine-bit opera-
tion. When the SCI is configured for 8-bit operation, R8/T8 has no meaning or effect.
D.6.8 Port QS Data Register
PORTQS — Port QS Data Register
15
8
NOT USED
7
PQS7
RESET:
0
$YFFC14
6
5
4
3
2
1
0
PQS6 PQS5 PQS4 PQS3 PQS2 PQS1 PQS0
0
0
0
0
0
0
0
PORTQS latches I/O data. Writes drive pins defined as outputs. Reads return data
present on the pins. To avoid driving undefined data, first write a byte to PORTQS,
then configure DDRQS.
D-44
REGISTER SUMMARY
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M68HC16 Z SERIES
USER’S MANUAL