MC68HC16Z1 Datasheet, PDF (283/500 Pages) Freescale Semiconductor, Inc – M68HC16Z Series

Freescale Semiconductor, Inc.
Data written to PWMA and PWMB is not used until the end of a complete cycle. This
prevents spurious short or long pulses when register values are changed. The current
duty cycle value is stored in the appropriate PWM buffer register (PWMBUFA or PW-
MBUFB). The new value is transferred from the PWM register to the buffer register at
the end of the current cycle.
Registers PWMA, PWMB, and PWMC are reset to $00 during reset. These registers
may be written or read at any time. PWMC is implemented as the lower byte of a 16-
bit register. The upper byte is the CFORC register. The buffer registers, PWMBUFA
and PWMBUFB, are read-only at all times and may be accessed as separate bytes or
as one 16-bit register.
Pins PWMA and PWMB can also be used for general-purpose output. The values of
the F1A and F1B bits in PWMC are driven out on the corresponding PWM pins when
normal PWM operation is disabled. When read, the F1A and F1B bits reflect the states
of the PWMA and PWMB pins.
M68HC16 Z SERIES
USER’S MANUAL
GENERAL-PURPOSE TIMER
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11-19