MC68HC16Z1 Datasheet, PDF (160/500 Pages) Freescale Semiconductor, Inc – M68HC16Z Series

Freescale Semiconductor, Inc.
NOTE
Pins that are not used should either be configured as outputs, or (if
configured as inputs) pulled to the appropriate inactive state. This de-
creases additional I_DD caused by digital inputs floating near mid-sup-
ply level.
5.7.5.1 Reset States of SIM Pins
Generally, while RESET is asserted, SIM pins either go to an inactive high-impedance
state or are driven to their inactive states. After RESET is released, mode selection
occurs, and reset exception processing begins. Pins configured as inputs must be
driven to the desired active state. Pull-up or pull-down circuitry may be necessary. Pins
configured as outputs begin to function after RESET is released. Table 5-21 is a sum-
mary of SIM pin states during reset.
Table 5-21 SIM Pin Reset States
Pin(s)
CS10/ADDR23/ECLK
CS[9:6]/ADDR[22:19]/PC[6:3]
ADDR[18:0]
AS/PE5
AVEC/PE2
BERR
CS1/BG
CS2/BGACK
CS0/BR
CLKOUT
CSBOOT
DATA[15:0]
DS/PE4
DSACK0/PE0
DSACK1/PE1
CS[5:3]/FC[2:0]/PC[2:0]
HALT
IRQ[7:1]/PF[7:1]
MODCLK/PF0
R/W
RESET
SIZ[1:0]/PE[7:6]
TSC
Pin State
While RESET
Asserted
V_DD
V_DD
High-Z
High-Z
High-Z
High-Z
V_DD
V_DD
V_DD
Output
V_DD
Mode select
High-Z
High-Z
High-Z
V_DD
High-Z
High-Z
Mode Select
High-Z
Asserted
High-Z
Mode select
Pin State After RESET Released
Default Function
Alternate Function
Pin Function Pin State Pin Function Pin State
CS10
CS[9:6]
ADDR[18:0]
V_DD
V_DD
Unknown
ADDR23
ADDR[22:19]
ADDR[18:0]
Unknown
Unknown
Unknown
AS
Output
PE5
Input
AVEC
Input
PE2
Input
BERR
Input
BERR
Input
CS1
CS2
CS0
CLKOUT
V_DD
V_DD
V_DD
Output
BG
BGACK
BR
CLKOUT
V_DD
Input
Input
Output
CSBOOT
DATA[15:0]
V_SS
Input
CSBOOT
DATA[15:0]
V_SS
Input
DS
Output
PE4
Input
DSACK0
Input
PE0
Input
DSACK1
Input
PE1
Input
CS[5:3]
HALT
V_DD
Input
FC[2:0]
HALT
Unknown
Input
IRQ[7:1]
Input
PF[7:1]
Input
MODCLK
Input
PF0
Input
R/W
Output
R/W
Output
RESET
Input
RESET
Input
SIZ[1:0]
Unknown
PE[7:6]
Input
TSC
Input
TSC
Input
5.7.5.2 Reset States of Pins Assigned to Other MCU Modules
As a rule, module pins that are assigned to general-purpose I/O ports go into a high-
impedance state following reset. However, during power-on reset, module port pins
may be in an indeterminate state for a short period. Refer to 5.7.7 Power-On Reset
for more information.
5-54
SYSTEM INTEGRATION MODULE
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M68HC16 Z SERIES
USER’S MANUAL