MC68HC16Z1 Datasheet, PDF (408/500 Pages) Freescale Semiconductor, Inc – M68HC16Z Series

Freescale Semiconductor, Inc.
Table D-29 Single-Channel Conversions (MULT = 0)
S8CM CD CC CB CA
Input
Result Register¹
0
0000
AN0
RSLT[0:3]
0
0001
AN1
RSLT[0:3]
0
0010
AN2
RSLT[0:3]
0
0011
AN3
RSLT[0:3]
0
0100
AN4
RSLT[0:3]
0
0101
AN5
RSLT[0:3]
0
0110
AN6
RSLT[0:3]
0
0111
AN7
RSLT[0:3]
0
1000
Reserved
RSLT[0:3]
0
1001
Reserved
RSLT[0:3]
0
1010
Reserved
RSLT[0:3]
0
1011
Reserved
RSLT[0:3]
0
1100
0
1101
0
1110
0
1111
V_RH
V_RL
(V_{RH –} V_RL) / 2
Test/Reserved
RSLT[0:3]
RSLT[0:3]
RSLT[0:3]
RSLT[0:3]
1
0000
AN0
RSLT[0:7]
1
0001
AN1
RSLT[0:7]
1
0010
AN2
RSLT[0:7]
1
0011
AN3
RSLT[0:7]
1
0100
AN4
RSLT[0:7]
1
0101
AN5
RSLT[0:7]
1
0110
AN6
RSLT[0:7]
1
0111
AN7
RSLT[0:7]
1
1000
Reserved
RSLT[0:7]
1
1001
Reserved
RSLT[0:7]
1
1010
Reserved
RSLT[0:7]
1
1011
Reserved
RSLT[0:7]
1
1100
V_RH
1
1101
V_RL
RSLT[0:7]
RSLT[0:7]
1
1110
(V_{RH –} V_RL) / 2
RSLT[0:7]
1
1111
Test/Reserved
RSLT[0:7]
NOTES:
1. Result register (RSLT) is either RJURRX, LJSRRX, or LJURRX, depending on the address read.
D-34
REGISTER SUMMARY
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