MC68HC16Z1 Datasheet, PDF (215/500 Pages) Freescale Semiconductor, Inc – M68HC16Z Series

Freescale Semiconductor, Inc.
9.3 Queued Serial Peripheral Interface
The queued serial peripheral interface (QSPI) is used to communicate with external
devices through a synchronous serial bus. The QSPI is fully compatible with SPI sys-
tems found on other Freescale products, but has enhanced capabilities. The QSPI can
perform full duplex three-wire or half duplex two-wire transfers. A variety of transfer
rates, clocking, and interrupt-driven communication options is available.
Figure 9-2 displays a block diagram of the QSPI.
QUEUE CONTROL
BLOCK
QUEUE
POINTER
COMPARATOR
END QUEUE
POINTER
CONTROL
LOGIC
STATUS
REGISTER
CONTROL
REGISTERS
DELAY
COUNTER
4
A
D
DONE
D
R
E
S
4
S
R
E
G
I
S
T
E
R
80-BYTE
QSPI RAM
4 _{CHIP SELECT}
4
COMMAND
PROGRAMMABLE
LOGIC ARRAY
M
MSB
LSB
S
8/16-BIT SHIFT REGISTER
Rx/Tx DATA REGISTER
M
S
2
BAUD RATE
GENERATOR
MOSI
MISO
PCS0/SS
PCS[2:1]
SCK
M68HC16 Z SERIES
USER’S MANUAL
Figure 9-2 QSPI Block Diagram
QUEUED SERIAL MODULE
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QSPI BLOCK
9-5