MC68HC16Z1 Datasheet, PDF (24/500 Pages) Freescale Semiconductor, Inc – M68HC16Z Series

Table
Freescale Semiconductor, Inc.
LIST OF TABLES
(Continued)
Title
Page
D-3
D-4
D-5
D-6
D-7
D-8
D-9
D-10
D-11
D-12
D-13
D-14
D-15
D-16
D-17
D-18
D-19
D-20
D-21
D-22
D-23
D-24
D-25
D-26
D-27
D-28
D-29
D-30
D-31
D-32
D-33
D-34
D-35
D-36
D-37
D-38
D-39
D-40
D-41
D-42
D-43
Show Cycle Enable Bits ..................................................................................D-6
Port E Pin Assignments.................................................................................D-10
Port F Pin Assignments.................................................................................D-11
Software Watchdog Divide Ratio...................................................................D-12
Bus Monitor Time-Out Period........................................................................D-13
Pin Assignment Field Encoding.....................................................................D-16
CSPAR0 Pin Assignments ............................................................................D-16
CSPAR1 Pin Assignments ............................................................................D-17
Reset Pin Function of CS[10:6] .....................................................................D-17
Block Size Field Bit Encoding........................................................................D-18
BYTE Field Bit Encoding ...............................................................................D-19
Read/Write Field Bit Encoding ......................................................................D-19
DSACK Field Encoding .................................................................................D-20
Memory Access Times at 16.78, 20.97, and 25.17 MHz...............................D-20
Address Space Bit Encodings .......................................................................D-21
Interrupt Priority Level Field Encoding ..........................................................D-21
SRAM Address Map......................................................................................D-23
SRAM Array Address Space Type ................................................................D-23
MRM Address Map........................................................................................D-25
ROM Array Space Field ................................................................................D-26
Wait States Field ...........................................................................................D-26
ADC Module Address Map............................................................................D-29
Freeze Encoding ...........................................................................................D-30
Sample Time Selection .................................................................................D-31
Prescaler Output ...........................................................................................D-32
ADC Conversion Mode..................................................................................D-33
Single-Channel Conversions (MULT = 0)......................................................D-34
Multiple-Channel Conversions (MULT = 1) ...................................................D-35
QSM Address Map ........................................................................................D-38
Examples of SCI Baud Rates........................................................................D-41
PQSPAR Pin Assignments............................................................................D-45
Effect of DDRQS on QSM Pin Function ........................................................D-46
Bits Per Transfer ...........................................................................................D-47
Examples of SCK Frequencies .....................................................................D-48
MCCI Address Map .......................................................................................D-54
Interrupt Vector Sources ...............................................................................D-56
MPAR Pin Assignments ................................................................................D-57
Effect of MDDR on MCCI Pin Function .........................................................D-58
Examples of SCI Baud Rates........................................................................D-60
GPT Address Map.........................................................................................D-67
GPT Interrupt Sources ..................................................................................D-69
For More Information On This Product,
Go to: www.freescale.com
M68HC16 Z SERIES
USER’S MANUAL