LM3S610_06 Datasheet, PDF (8/396 Pages) List of Unclassifed Manufacturers – Microcontroller

List of Figures
List of Figures
Figure 1-1. Stellaris High-Level Block Diagram ........................................................................................... 26
Figure 1-2. LM3S610 Controller System-Level Block Diagram ................................................................... 32
Figure 2-1. CPU Block Diagram .................................................................................................................. 34
Figure 2-2. TPIU Block Diagram .................................................................................................................. 35
Figure 5-1. JTAG Module Block Diagram .................................................................................................... 42
Figure 5-2. Test Access Port State Machine ............................................................................................... 45
Figure 5-3. IDCODE Register Format.......................................................................................................... 49
Figure 5-4. BYPASS Register Format ......................................................................................................... 49
Figure 5-5. Boundary Scan Register Format ............................................................................................... 50
Figure 6-1. External Circuitry to Extend Reset............................................................................................. 52
Figure 6-2. Main Clock Tree ........................................................................................................................ 55
Figure 7-1. Flash Block Diagram ................................................................................................................. 93
Figure 8-1. GPIO Module Block Diagram .................................................................................................. 108
Figure 8-2. GPIO Port Block Diagram........................................................................................................ 109
Figure 8-3. GPIODATA Write Example...................................................................................................... 110
Figure 8-4. GPIODATA Read Example ..................................................................................................... 110
Figure 9-1. GPTM Module Block Diagram ................................................................................................. 146
Figure 9-2. 16-Bit Input Edge Count Mode Example ................................................................................. 150
Figure 9-3. 16-Bit Input Edge Time Mode Example................................................................................... 151
Figure 9-4. 16-Bit PWM Mode Example .................................................................................................... 152
Figure 10-1. WDT Module Block Diagram ................................................................................................... 177
Figure 11-1. ADC Module Block Diagram.................................................................................................... 200
Figure 11-2. Internal Temperature Sensor Characteristic............................................................................ 203
Figure 12-1. UART Module Block Diagram.................................................................................................. 231
Figure 12-2. UART Character Frame........................................................................................................... 232
Figure 13-1. SSI Module Block Diagram...................................................................................................... 266
Figure 13-2. TI Synchronous Serial Frame Format (Single Transfer).......................................................... 268
Figure 13-3. TI Synchronous Serial Frame Format (Continuous Transfer) ................................................. 269
Figure 13-4. Freescale SPI Format (Single Transfer) with SPO=0 and SPH=0 .......................................... 270
Figure 13-5. Freescale SPI Format (Continuous Transfer) with SPO=0 and SPH=0 .................................. 270
Figure 13-6. Freescale SPI Frame Format with SPO=0 and SPH=1........................................................... 271
Figure 13-7. Freescale SPI Frame Format (Single Transfer) with SPO=1 and SPH=0............................... 271
Figure 13-8. Freescale SPI Frame Format (Continuous Transfer) with SPO=1 and SPH=0....................... 272
Figure 13-9. Freescale SPI Frame Format with SPO=1 and SPH=1........................................................... 272
Figure 13-10. MICROWIRE Frame Format (Single Frame)........................................................................... 273
Figure 13-11. MICROWIRE Frame Format (Continuous Transfer) ............................................................... 274
Figure 13-12. MICROWIRE Frame Format, SSIFss Input Setup and Hold Requirements............................ 275
Figure 14-1. I²C Block Diagram ................................................................................................................... 301
Figure 14-2. I²C Bus Configuration.............................................................................................................. 302
Figure 14-3. Data Validity During Bit Transfer on the I²C Bus..................................................................... 302
Figure 14-4. START and STOP Conditions ................................................................................................. 302
Figure 14-5. Complete Data Transfer with a 7-Bit Address ......................................................................... 303
Figure 14-6. R/S Bit in First Byte ................................................................................................................. 304
Figure 14-7. Master Single SEND................................................................................................................ 304
Figure 14-8. Master Single RECEIVE.......................................................................................................... 305
Figure 14-9. Master Burst SEND ................................................................................................................. 306
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October 8, 2006
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