LM3S610_06 Datasheet, PDF (344/396 Pages) List of Unclassifed Manufacturers – Microcontroller

Pulse Width Modulator (PWM)
Register 4: PWM Output Inversion (PWMINVERT), offset 0x00C
This register provides a master control of the polarity of the PWM signals on the device pins. The
PWM signals generated by the dead-band block are active High; they can optionally be made
active Low via this register. Disabled PWM channels are also passed through the output inverter (if
so configured) so that inactive channels maintain the correct polarity.
PWM Output Inversion (PWMINVERT)
Offset 0x00C
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
PWM5Inv PWM4Inv PWM3Inv PWM2Inv PWM1Inv PWM0Inv
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:6
Name
reserved
5
PWM5Inv
4
PWM4Inv
3
PWM3Inv
2
PWM2Inv
1
PWM1Inv
0
PWM0Inv
Type
RO
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
Description
Reserved bits return an indeterminate value, and should
never be changed.
When set, the generated PWM5 signal is inverted.
When set, the generated PWM4 signal is inverted.
When set, the generated PWM3 signal is inverted.
When set, the generated PWM2 signal is inverted.
When set, the generated PWM1 signal is inverted.
When set, the generated PWM0 signal is inverted.
344
October 8, 2006
Preliminary