LM3S610_06 Datasheet, PDF (321/396 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S610 Data Sheet
Register 6: I²C Master Raw Interrupt Status (I2CMRIS), offset 0x014
This register specifies whether an interrupt is pending.
I2C Master Raw Interrupt Status (I2CMRIS)
Offset 0x014
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
RIS
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:1
0
Name
reserved
RIS
Type
RO
RO
Reset
0
0
Description
Reserved bits return an indeterminate value, and should
never be changed.
This bit specifies the raw interrupt state (prior to masking) of
the I²C master block. If set, an interrupt is pending;
otherwise, an interrupt is not pending.
October 8, 2006
321
Preliminary