LM3S610_06 Datasheet, PDF (341/396 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S610 Data Sheet
Register 1: PWM Master Control (PWMCTL), offset 0x000
This register provides master control over the PWM generation blocks.
PWM Master Control (PWMCTL)
Offset 0x000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
GlobalSync2 GlobalSync1 GlobalSync0
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:3
Name
reserved
2
GlobalSync2
1
GlobalSync1
0
GlobalSync0
Type
RO
R/W
R/W
R/W
Reset
0
0
0
0
Description
Reserved bits return an indeterminate value, and should
never be changed.
Same as GlobalSync0 but for PWM generator 2.
Same as GlobalSync0 but for PWM generator 1.
Setting this bit causes any queued update to a load or
comparator register in PWM generator 0 to be applied the
next time the corresponding counter becomes zero. This bit
automatically clears when the updates have completed; it
cannot be cleared by software.
October 8, 2006
341
Preliminary