LM3S610_06 Datasheet, PDF (342/396 Pages) List of Unclassifed Manufacturers – Microcontroller

Pulse Width Modulator (PWM)
Register 2: PWM Time Base Sync (PWMSYNC), offset 0x004
This register provides a method to perform synchronization of the counters in the PWM generation
blocks. Writing a bit in this register to 1 causes the specified counter to reset back to 0; writing
multiple bits resets multiple counters simultaneously. The bits auto-clear after the reset has
occurred; reading them back as zero indicates that the synchronization has completed.
PWM Time Base Sync (PWMSYNC)
Offset 0x004
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
Sync2 Sync1 Sync0
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:3
2
1
0
Name
reserved
Sync2
Sync1
Sync0
Type
RO
R/W
R/W
R/W
Reset
0
0
0
0
Description
Reserved bits return an indeterminate value, and should
never be changed.
Performs a reset of the PWM generator 2 counter.
Performs a reset of the PWM generator 1 counter.
Performs a reset of the PWM generator 0 counter.
342
October 8, 2006
Preliminary