LM3S610_06 Datasheet, PDF (356/396 Pages) List of Unclassifed Manufacturers – Microcontroller

Pulse Width Modulator (PWM)
Register 22: PWM0 Load (PWM0LOAD), offset 0x050
Register 23: PWM1 Load (PWM1LOAD), offset 0x090
Register 24: PWM2 Load (PWM2LOAD), offset 0x0D0
These registers contain the load value for the PWM counter (PWM0LOAD controls the PWM
generator 0 block, and so on). Based on the counter mode, either this value is loaded into the
counter after it reaches zero, or it is the limit of up-counting after which the counter decrements
back to zero. If the Load Value Update mode is immediate, this value is used the next time the
counter reaches zero; if the mode is synchronous, it is used the next time the counter reaches zero
after a synchronous update has been requested through the PWM Master Control (PWMCTL)
register (see page 341). If this register is re-written before the actual update occurs, the previous
value is never used and is lost.
PWMn Load (PWMnLOAD)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Load
Type R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:16
15:0
Name
reserved
Load
Type
RO
R/W
Reset
0
0
Description
Reserved bits return an indeterminate value, and should
never be changed.
The counter load value.
356
October 8, 2006
Preliminary