LM3S610_06 Datasheet, PDF (382/396 Pages) List of Unclassifed Manufacturers – Microcontroller

Electrical Characteristics
19.2.5 I²C
Table 19-10. I²C Characteristics
Parameter
No.
Parameter
Parameter Name
Min
Nom
Max
Unit
I1^a
t_SCH
Start condition hold time
36
-
-
system
clocks
I2^a
t_LP
Clock Low period
36
-
-
system
clocks
I3^b
t_SRT
I2CSCL/I2CSDA rise time
(V_IL=0.5 V to V_IH=2.4 V)
I4^a
t_DH
Data hold time
-
-
(see
ns
note b)
2
-
-
system
clocks
I5^c
t_SFT
I2CSCL/I2CSDA fall time
(V_IH=2.4 V to V_IL=0.5 V)
I6^a
t_HT
Clock High time
-
9
24
-
10
ns
-
system
clocks
I7^a
t_DS
Data setup time
18
-
-
system
clocks
I8^a
t_SCSR
Start condition setup time (for repeated
36
-
-
system
start condition only)
clocks
I9^a
t_SCS
Stop condition setup time
24
-
-
system
clocks
a. Values depend on the value programmed into the TPR bit in the I²C Master Timer Period (I2CMTPR) register (see page 319); a
TPR programmed for the maximum I2CSCL frequency (TPR=0x2) results in a minimum output timing as shown in the table
above. The I²C interface is designed to scale the actual data transition time to move it to the middle of the I2CSCL Low period.
The actual position is affected by the value programmed into the TPR; however, the numbers given in the above values are
minimum values.
b. Because I2CSCL and I2CSDA are open-drain-type outputs, which the controller can only actively drive Low, the
time I2CSCL or I2CSDA takes to reach a high level depends on external signal capacitance and pull-up resistor
values.
c. Specified at a nominal 50 pF load.
Figure 19-2. I²C Timing
I2CSCL
I1
I2CSDA
I2
I4
I6
I7
I5
I8 I3
382
October 8, 2006
Preliminary