LM3S610_06 Datasheet, PDF (12/396 Pages) List of Unclassifed Manufacturers – Microcontroller

List of Registers
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
Register 20:
Register 21:
Register 22:
Register 23:
Register 24:
Register 25:
Register 26:
Register 27:
Register 28:
Register 29:
Register 30:
GPIO Interrupt Event (GPIOIEV), offset 0x40C....................................................................... 119
GPIO Interrupt Mask (GPIOIM), offset 0x410.......................................................................... 120
GPIO Raw Interrupt Status (GPIORIS), offset 0x414.............................................................. 121
GPIO Masked Interrupt Status (GPIOMIS), offset 0x418 ........................................................ 122
GPIO Interrupt Clear (GPIOICR), offset 0x41C....................................................................... 123
GPIO Alternate Function Select (GPIOAFSEL), offset 0x420 ................................................. 124
GPIO 2-mA Drive Select (GPIODR2R), offset 0x500.............................................................. 125
GPIO 4-mA Drive Select (GPIODR4R), offset 0x504.............................................................. 126
GPIO 8-mA Drive Select (GPIODR8R), offset 0x508.............................................................. 127
GPIO Open Drain Select (GPIOODR), offset 0x50C............................................................... 128
GPIO Pull-Up Select (GPIOPUR), offset 0x510 ...................................................................... 129
GPIO Pull-Down Select (GPIOPDR), offset 0x514.................................................................. 130
GPIO Slew Rate Control Select (GPIOSLR), offset 0x518...................................................... 131
GPIO Digital Input Enable (GPIODEN), offset 0x51C ............................................................. 132
GPIO Peripheral Identification 4 (GPIOPeriphID4), offset 0xFD0 ........................................... 133
GPIO Peripheral Identification 5 (GPIOPeriphID5), offset 0xFD4 ........................................... 134
GPIO Peripheral Identification 6 (GPIOPeriphID6), offset 0xFD8 ........................................... 135
GPIO Peripheral Identification 7 (GPIOPeriphID7), offset 0xFDC........................................... 136
GPIO Peripheral Identification 0 (GPIOPeriphID0), offset 0xFE0 ........................................... 137
GPIO Peripheral Identification 1(GPIOPeriphID1), offset 0xFE4 ............................................ 138
GPIO Peripheral Identification 2 (GPIOPeriphID2), offset 0xFE8 ........................................... 139
GPIO Peripheral Identification 3 (GPIOPeriphID3), offset 0xFEC........................................... 140
GPIO PrimeCell Identification 0 (GPIOPCellID0), offset 0xFF0 .............................................. 141
GPIO PrimeCell Identification 1 (GPIOPCellID1), offset 0xFF4 .............................................. 142
GPIO PrimeCell Identification 2 (GPIOPCellID2), offset 0xFF8 .............................................. 143
GPIO PrimeCell Identification 3 (GPIOPCellID3), offset 0xFFC.............................................. 144
General-Purpose Timers .............................................................................................................. 145
Register 1: GPTM Configuration (GPTMCFG), offset 0x000..................................................................... 157
Register 2: GPTM TimerA Mode (GPTMTAMR), offset 0x004 .................................................................. 158
Register 3: GPTM TimerB Mode (GPTMTBMR), offset 0x008 .................................................................. 159
Register 4: GPTM Control (GPTMCTL), offset 0x00C............................................................................... 160
Register 5: GPTM Interrupt Mask (GPTMIMR), offset 0x018 .................................................................... 162
Register 6: GPTM Raw Interrupt Status (GPTMRIS), offset 0x01C .......................................................... 164
Register 7: GPTM Masked Interrupt Status (GPTMMIS), offset 0x020 ..................................................... 165
Register 8: GPTM Interrupt Clear (GPTMICR), offset 0x024..................................................................... 166
Register 9: GPTM TimerA Interval Load (GPTMTAILR), offset 0x028 ...................................................... 167
Register 10: GPTM TimerB Interval Load (GPTMTBILR), offset 0x02C...................................................... 168
Register 11: GPTM TimerA Match (GPTMTAMATCHR), offset 0x030 ....................................................... 169
Register 12: GPTM TimerB Match (GPTMTBMATCHR), offset 0x034 ....................................................... 170
Register 13: GPTM TimerA Prescale (GPTMTAPR), offset 0x038.............................................................. 171
Register 14: GPTM TimerB Prescale (GPTMTBPR), offset 0x03C ............................................................. 172
Register 15: GPTM TimerA Prescale Match (GPTMTAPMR), offset 0x040................................................ 173
Register 16: GPTM TimerB Prescale Match (GPTMTBPMR), offset 0x044................................................ 174
Register 17: GPTM TimerA (GPTMTAR), offset 0x048 ............................................................................... 175
Register 18: GPTM TimerB (GPTMTBR), offset 0x04C .............................................................................. 176
Watchdog Timer............................................................................................................................ 177
Register 1: Watchdog Load (WDTLOAD), offset 0x000 ............................................................................ 180
Register 2: Watchdog Value (WDTVALUE), offset 0x004 ......................................................................... 181
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October 8, 2006
Preliminary