LM3S610_06 Datasheet, PDF (334/396 Pages) List of Unclassifed Manufacturers – Microcontroller

Pulse Width Modulator (PWM)
15.2.2
mode is used for generating left- or right-aligned PWM signals, while the Count-Up/Down mode is
used for generating center-aligned PWM signals.
The timers output three signals that are used in the PWM generation process: the direction signal
(this is always Low in Count-Down mode, but alternates between Low and High in Count-Up/Down
mode), a single-clock-cycle-width High pulse when the counter is zero, and a
single-clock-cycle-width High pulse when the counter is equal to the load value. Note that in
Count-Down mode, the zero pulse is immediately followed by the load pulse.
PWM Comparators
There are two comparators in each PWM generator that monitor the value of the counter; when
either match the counter, they output a single-clock-cycle-width High pulse. When in Count-Up/
Down mode, these comparators match both when counting up and when counting down; they are
therefore qualified by the counter direction signal. These qualified pulses are used in the PWM
generation process. If either comparator match value is greater than the counter load value, then
that comparator never outputs a High pulse.
Figure 15-2 shows the behavior of the counter and the relationship of these pulses when the
counter is in Count-Down mode. Figure 15-3 shows the behavior of the counter and the
relationship of these pulses when the counter is in Count-Up/Down mode.
Figure 15-2. PWM Count-Down Mode
Load
CompA
CompB
Zero
Load
Zero
A
B
Dir
BDown
ADown
334
October 8, 2006
Preliminary