LM3S610_06 Datasheet, PDF (3/396 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S610 Data Sheet
Table of Contents
Legal Disclaimers and Trademark Information.............................................................................. 2
Revision History ............................................................................................................................. 17
About This Document..................................................................................................................... 18
Audience........................................................................................................................................................... 18
About This Manual............................................................................................................................................ 18
Related Documents .......................................................................................................................................... 18
Documentation Conventions............................................................................................................................. 18
1.
1.1
1.2
1.3
1.4
1.4.1
1.4.2
1.4.3
1.4.4
1.4.5
1.4.6
1.4.7
1.4.8
1.5
Architectural Overview ....................................................................................................... 21
Product Features ................................................................................................................................. 21
Target Applications .............................................................................................................................. 25
High-Level Block Diagram ................................................................................................................... 26
Functional Overview ............................................................................................................................ 27
ARM Cortex™-M3 ............................................................................................................................... 27
Motor Control Peripherals .................................................................................................................... 27
Analog Peripherals .............................................................................................................................. 28
Serial Communications Peripherals..................................................................................................... 28
System Peripherals.............................................................................................................................. 29
Memory Peripherals............................................................................................................................. 30
Additional Features .............................................................................................................................. 30
Hardware Details ................................................................................................................................. 31
System Block Diagram ........................................................................................................................ 32
2.
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.2.5
2.2.6
ARM Cortex-M3 Processor Core........................................................................................ 33
Block Diagram ..................................................................................................................................... 34
Functional Description ......................................................................................................................... 34
Serial Wire and JTAG Debug .............................................................................................................. 34
Embedded Trace Macrocell (ETM) ...................................................................................................... 35
Trace Port Interface Unit (TPIU) .......................................................................................................... 35
ROM Table .......................................................................................................................................... 35
Memory Protection Unit (MPU) ............................................................................................................ 35
Nested Vectored Interrupt Controller (NVIC) ....................................................................................... 35
3. Memory Map ........................................................................................................................ 36
4. Interrupts ............................................................................................................................. 38
5.
5.1
5.2
5.2.1
5.2.2
5.2.3
5.2.4
5.3
5.4
5.4.1
5.4.2
JTAG Interface .................................................................................................................... 41
Block Diagram ..................................................................................................................................... 42
Functional Description ......................................................................................................................... 42
JTAG Interface Pins............................................................................................................................. 43
JTAG TAP Controller ........................................................................................................................... 44
Shift Registers ..................................................................................................................................... 45
Operational Considerations ................................................................................................................. 45
Initialization and Configuration............................................................................................................. 46
Register Descriptions........................................................................................................................... 47
Instruction Register (IR) ....................................................................................................................... 47
Data Registers ..................................................................................................................................... 49
October 8, 2006
3
Preliminary