LM3S610_06 Datasheet, PDF (288/396 Pages) List of Unclassifed Manufacturers – Microcontroller

Synchronous Serial Interface (SSI)
Register 9: SSI Interrupt Clear (SSIICR), offset 0x020
The SSIICR register is the interrupt clear register. On a write of 1, the corresponding interrupt is
cleared. A write of 0 has no effect.
SSI Interrupt Clear (SSIICR)
Offset 0x020
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
RTIC RORIC
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
W1C
W1C
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:2
1
Name
reserved
RTIC
0
RORIC
Type
RO
W1C
W1C
Reset
0
0
0
Description
Reserved bits return an indeterminate value, and should
never be changed.
SSI Receive Time-Out Interrupt Clear
0: No effect on interrupt.
1: Clears interrupt.
SSI Receive Overrun Interrupt Clear
0: No effect on interrupt.
1: Clears interrupt.
288
October 8, 2006
Preliminary