LM3S610_06 Datasheet, PDF (15/396 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S610 Data Sheet
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
I2C Master Data (I2CMDR), offset 0x008................................................................................ 318
I²C Master Timer Period (I2CMTPR), offset 0x00C ................................................................ 319
I²C Master Interrupt Mask (I2CMIMR), offset 0x010 ............................................................... 320
I²C Master Raw Interrupt Status (I2CMRIS), offset 0x014 ...................................................... 321
I²C Master Masked Interrupt Status (I2CMMIS), offset 0x018 ................................................ 322
I²C Master Interrupt Clear (I2CMICR), offset 0x01C ............................................................... 323
I²C Master Configuration (I2CMCR), offset 0x020 .................................................................. 324
I²C Slave Own Address (I2CSOAR), offset 0x000 .................................................................. 325
I²C Slave Control/Status (I2CSCSR), offset 0x004 ................................................................. 326
I²C Slave Data (I2CSDR), offset 0x008................................................................................... 328
I²C Slave Interrupt Mask (I2CSIMR), offset 0x00C ................................................................. 329
I²C Slave Raw Interrupt Status (I2CSRIS), offset 0x010......................................................... 330
I²C Slave Masked Interrupt Status (I2CSMIS), offset 0x014................................................... 331
I²C Slave Interrupt Clear (I2CSICR), offset 0x018 .................................................................. 332
Pulse Width Modulator (PWM)..................................................................................................... 333
Register 1: PWM Master Control (PWMCTL), offset 0x000....................................................................... 341
Register 2: PWM Time Base Sync (PWMSYNC), offset 0x004................................................................. 342
Register 3: PWM Output Enable (PWMENABLE), offset 0x008................................................................ 343
Register 4: PWM Output Inversion (PWMINVERT), offset 0x00C............................................................. 344
Register 5: PWM Output Fault (PWMFAULT), offset 0x010...................................................................... 345
Register 6: PWM Interrupt Enable (PWMINTEN), offset 0x014................................................................. 346
Register 7: PWM Raw Interrupt Status (PWMRIS), offset 0x018 .............................................................. 347
Register 8: PWM Interrupt Status and Clear (PWMISC), offset 0x01C ..................................................... 348
Register 9: PWM Status (PWMSTATUS), offset 0x020............................................................................. 349
Register 10: PWM0 Control (PWM0CTL), offset 0x040............................................................................... 350
Register 11: PWM1 Control (PWM1CTL), offset 0x080............................................................................... 350
Register 12: PWM2 Control (PWM2CTL), offset 0x0C0 .............................................................................. 350
Register 13: PWM0 Interrupt/Trigger Enable (PWM0INTEN), offset 0x044 ................................................ 352
Register 14: PWM1 Interrupt/Trigger Enable (PWM1INTEN), offset 0x084 ................................................ 352
Register 15: PWM2 Interrupt/Trigger Enable (PWM2INTEN), offset 0x0C4................................................ 352
Register 16: PWM0 Raw Interrupt Status (PWM0RIS), offset 0x048 .......................................................... 354
Register 17: PWM1 Raw Interrupt Status (PWM1RIS), offset 0x088 .......................................................... 354
Register 18: PWM2 Raw Interrupt Status (PWM2RIS), offset 0x0C8.......................................................... 354
Register 19: PWM0 Interrupt Status and Clear (PWM0ISC), offset 0x04C ................................................. 355
Register 20: PWM1 Interrupt Status and Clear (PWM1ISC), offset 0x08C ................................................. 355
Register 21: PWM2 Interrupt Status and Clear (PWM2ISC), offset 0x0CC................................................. 355
Register 22: PWM0 Load (PWM0LOAD), offset 0x050 ............................................................................... 356
Register 23: PWM1 Load (PWM1LOAD), offset 0x090 ............................................................................... 356
Register 24: PWM2 Load (PWM2LOAD), offset 0x0D0............................................................................... 356
Register 25: PWM0 Counter (PWM0COUNT), offset 0x054 ....................................................................... 357
Register 26: PWM1 Counter (PWM1COUNT), offset 0x094 ....................................................................... 357
Register 27: PWM2 Counter (PWM2COUNT), offset 0x0D4....................................................................... 357
Register 28: PWM0 Compare A (PWM0CMPA), offset 0x058 .................................................................... 358
Register 29: PWM1 Compare A (PWM1CMPA), offset 0x098 .................................................................... 358
Register 30: PWM2 Compare A (PWM2CMPA), offset 0x0D8.................................................................... 358
Register 31: PWM0 Compare B (PWM0CMPB), offset 0x05C.................................................................... 359
Register 32: PWM1 Compare B (PWM1CMPB), offset 0x09C.................................................................... 359
Register 33: PWM2 Compare B (PWM2CMPB), offset 0x0DC ................................................................... 359
Register 34: PWM0 Generator A Control (PWM0GENA), offset 0x060....................................................... 360
Register 35: PWM1 Generator A Control (PWM1GENA), offset 0x0A0 ...................................................... 360
October 8, 2006
15
Preliminary