LM3S610_06 Datasheet, PDF (28/396 Pages) List of Unclassifed Manufacturers – Microcontroller

Architectural Overview
1.4.3
1.4.3.1
1.4.4
1.4.4.1
1.4.4.2
Each PWM generator block produces two PWM signals that can either be independent signals or
a single pair of complementary signals with dead-band delays inserted. The output of the PWM
generation blocks are managed by the output control block before being passed to the device pins.
CCP Pins (“16-Bit PWM Mode” on page 154)
The General-Purpose Timer Module’s CCP (Capture Compare PWM) pins are software
programmable to support a simple PWM mode with a software-programmable output inversion of
the PWM signal.
Analog Peripherals
To handle analog signals, the LM3S610 controller offers an Analog-to-Digital Converter (ADC).
ADC (Section 11 on page 200)
An analog-to-digital converter (ADC) is a peripheral that converts a continuous analog voltage to a
discrete digital number.
The Stellaris ADC module features 10-bit conversion resolution and supports two input channels,
plus an internal temperature sensor. Four buffered sample sequences allow rapid sampling of up
to eight analog input sources without controller intervention. Each sample sequence provides
flexible programming with fully configurable input source, trigger events, interrupt generation, and
sequence priority.
Serial Communications Peripherals
The LM3S610 controller supports both asynchronous and synchronous serial communications
with two fully programmable 16C550-type UARTs, SSI and I²C serial communications.
UART (Section 12 on page 230)
A Universal Asynchronous Receiver/Transmitter (UART) is an integrated circuit used for RS-232C
serial communications, containing a transmitter (parallel-to-serial converter) and a receiver
(serial-to-parallel converter), each clocked separately.
The LM3S610 controller includes two fully programmable 16C550-type UARTs that support data
transfer speeds up to 460.8 Kbps. (Although similar in functionality to a 16C550 UART, it is not
register compatible.)
Separate 16x8 transmit (TX) and 16x12 receive (RX) FIFOs reduce CPU interrupt service loading.
The UART can generate individually masked interrupts from the RX, TX, modem status, and error
conditions. The module provides a single combined interrupt when any of the interrupts are
asserted and are unmasked.
SSI (Section 13 on page 266)
Synchronous Serial Interface (SSI) is a four-wire bi-directional communications interface.
The Stellaris SSI module provides the functionality for synchronous serial communications with
peripheral devices, and can be configured to use the Freescale SPI, MICROWIRE, or TI
synchronous serial interface frame formats. The size of the data frame is also configurable, and
can be set between 4 and 16 bits, inclusive.
The SSI module performs serial-to-parallel conversion on data received from a peripheral device,
and parallel-to-serial conversion on data transmitted to a peripheral device. The TX and RX paths
are buffered with internal FIFOs, allowing up to eight 16-bit values to be stored independently.
The SSI module can be configured as either a master or slave device. As a slave device, the SSI
module can also be configured to disable its output, which allows a master device to be coupled
with multiple slave devices.
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October 8, 2006
Preliminary