LM3S610_06 Datasheet, PDF (71/396 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S610 Data Sheet
Register 10: Software Reset Control 0 (SRCR0), offset 0x040
Writes to this register are masked by the bits in the Device Capabilities 1 (DC1) register (see
page 63).
Software Reset Control 0 (SRCR0)
Offset 0x040
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
PWM
reserved
ADC
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R/W
RO
RO
RO
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
WDT
reserved
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R/W
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:21
20
19:17
16
15:4
3
2:0
Name
reserved
PWM
reserved
ADC
reserved
WDT
reserved
Type
RO
R/W
RO
R/W
RO
R/W
RO
Reset
0
0
0
0
0
0
0
Description
Reserved bits return an indeterminate value, and should
never be changed.
Reset control for the PWM units.
Reserved bits return an indeterminate value, and should
never be changed.
Reset control for the ADC units.
Reserved bits return an indeterminate value, and should
never be changed.
Reset control for the Watchdog unit.
Reserved bits return an indeterminate value, and should
never be changed.
October 8, 2006
71
Preliminary