LM3S610_06 Datasheet, PDF (5/396 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S610 Data Sheet
10. Watchdog Timer ................................................................................................................ 177
10.1 Block Diagram ................................................................................................................................... 177
10.2 Functional Description ....................................................................................................................... 178
10.3 Initialization and Configuration........................................................................................................... 178
10.4 Register Map ..................................................................................................................................... 178
10.5 Register Descriptions......................................................................................................................... 179
11. Analog-to-Digital Converter (ADC) .................................................................................. 200
11.1 Block Diagram ................................................................................................................................... 200
11.2 Functional Description ....................................................................................................................... 201
11.2.1 Sample Sequencers .......................................................................................................................... 201
11.2.2 Module Control .................................................................................................................................. 202
11.2.3 Hardware Sample Averaging Circuit.................................................................................................. 202
11.2.4 Analog-to-Digital Converter ............................................................................................................... 202
11.2.5 Test Modes ........................................................................................................................................ 202
11.2.6 Internal Temperature Sensor ............................................................................................................. 203
11.3 Initialization and Configuration........................................................................................................... 203
11.3.1 Module Initialization ........................................................................................................................... 203
11.3.2 Sample Sequencer Configuration ...................................................................................................... 203
11.4 Register Map ..................................................................................................................................... 204
11.5 Register Descriptions......................................................................................................................... 205
12. Universal Asynchronous Receivers/Transmitters (UARTs).......................................... 230
12.1 Block Diagram ................................................................................................................................... 231
12.2 Functional Description ....................................................................................................................... 231
12.2.1 Transmit/Receive Logic ..................................................................................................................... 231
12.2.2 Baud-Rate Generation ....................................................................................................................... 232
12.2.3 Data Transmission ............................................................................................................................. 233
12.2.4 FIFO Operation .................................................................................................................................. 233
12.2.5 Interrupts............................................................................................................................................ 233
12.2.6 Loopback Operation .......................................................................................................................... 234
12.3 Initialization and Configuration........................................................................................................... 234
12.4 Register Map ..................................................................................................................................... 235
12.5 Register Descriptions......................................................................................................................... 236
13. Synchronous Serial Interface (SSI) ................................................................................. 266
13.1 Block Diagram ................................................................................................................................... 266
13.2 Functional Description ....................................................................................................................... 267
13.2.1 Bit Rate Generation ........................................................................................................................... 267
13.2.2 FIFO Operation .................................................................................................................................. 267
13.2.3 Interrupts............................................................................................................................................ 267
13.2.4 Frame Formats .................................................................................................................................. 268
13.3 Initialization and Configuration........................................................................................................... 275
13.4 Register Map ..................................................................................................................................... 276
13.5 Register Descriptions......................................................................................................................... 277
14. Inter-Integrated Circuit (I2C) Interface ............................................................................ 301
14.1 Block Diagram ................................................................................................................................... 301
14.2 Functional Description ....................................................................................................................... 301
14.2.1 I²C Bus Functional Overview ............................................................................................................. 302
14.2.2 Available Speed Modes ..................................................................................................................... 309
14.3 Initialization and Configuration........................................................................................................... 310
14.4 Register Map ..................................................................................................................................... 311
October 8, 2006
5
Preliminary