LM3S610_06 Datasheet, PDF (302/396 Pages) List of Unclassifed Manufacturers – Microcontroller

Inter-Integrated Circuit (I2C) Interface
Figure 14-2. I²C Bus Configuration
SCL
SDA
RPUP RPUP
I2C Bus
I2CSCL I2CSDA
StellarisTM
SCL
SDA
3rd Party Device
with I2C Interface
SCL SDA
3rd Party Device
with I2C Interface
14.2.1
14.2.1.1
14.2.1.2
I²C Bus Functional Overview
The I²C bus uses only two signals: SDA and SCL, named I2CSDA and I2CSCL on Stellaris
microcontrollers. SDA is the bi-directional serial data line and SCL is the bi-directional serial clock
line.
Data Transfers
Both the SDA and SCL lines are bi-directional, connected to the positive supply via pull-up
resistors. The bus is idle or free, when both lines are High. The output devices (pad drivers) must
have an open-drain configuration. Data on the I²C bus can be transferred at rates up to 100 Kbps
in Standard mode and up to 400 Kbps in Fast mode.
Data Validity
The data on the SDA line must be stable during the High period of the clock. The data line can only
change when the clock SCL is in its Low state (see Figure 14-3).
Figure 14-3. Data Validity During Bit Transfer on the I²C Bus
SDA
SCL
Data line Change
stable of data
allowed
14.2.1.3
START and STOP Conditions
The protocol of the I²C bus defines two states: START and STOP. A High-to-Low transition on the
SDA line while the SCL is High is a START condition. A Low-to-High transition on the SDA line
while SCL is High is defined as a STOP condition. The bus is considered busy after a START
condition. The bus is considered free after a STOP condition. See Figure 14-4.
Figure 14-4. START and STOP Conditions
SDA
SDA
SCL
START
condition
STOP
condition
SCL
302
October 8, 2006
Preliminary