AK4671_10 Datasheet, PDF (29/166 Pages) Asahi Kasei Microsystems – Stereo CODEC with MIC/RCV/HP-AMP

[AK4671]
MCKI
LRCK
BICK
1/fCLK
tCLKH
tCLKL
1/fs
tLRCKH
tLRCKL
tBCK
tBCKH
tBCKL
1/fMCK
VIH1
VIL1
VIH1
VIL1
Duty = tLRCKH x fs x 100
tLRCKL x fs x 100
VIH1
VIL1
MCKO
50%DVDD
tMCKL
dMCK = tMCKL x fMCK x 100
Figure 9. Clock Timing (PLL Slave mode; Except DSP mode)
LRCK
tLRCKH
tLRB
VIH1
VIL1
BICK
(BCKP = "0")
BICK
(BCKP = "1")
tBSD
VIH1
VIL1
VIH1
VIL1
SDTO
MSB
50%DVDD
tSDS
tSDH
SDTI
MSB
VIH1
VIL1
Figure 10. Audio Interface Timing (PLL Slave mode, DSP mode; MSBS = “0”)
MS0666-E-02
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2010/06