AK4671_10 Datasheet, PDF (22/166 Pages) Asahi Kasei Microsystems – Stereo CODEC with MIC/RCV/HP-AMP

[AK4671]
Parameter
Symbol
min
PCM Interface Timing (BICKA, SYNCA, SDTIA, SDTOA pins; Master Mode):
SYNCA Timing
Frequency
fs2
-
BICKA Timing
Period (BCKO2 bit = “0”)
tBCK2
-
(BCKO2 bit = “1”)
tBCK2
-
Duty Cycle
dBCK2
-
Serial Interface Timing at Short/long Frame Sync
SYNCA Edge to BICKA “↓” (Note 46)
tSYB2 0.5 x tBCK2 − 40
SYNCA Edge to BICKA “↑” (Note 47)
tSYB2 0.5 x tBCK2 − 40
BICKA “↑” to SDTOA (BCKPA bit = “0”)
tBSD2
−70
BICKA “↓” to SDTOA (BCKPA bit = “1”)
tBSD2
−70
SDTIA Hold Time
tSDH2
50
SDTIA Setup Time
tSDS2
50
SYNCA Pulse Width High
tSYH2
-
Serial Interface Timing at MSB justified and I²S
BICKA “↓” to SYNCA Edge
tMBSY2
−40
SYNCA to SDTOA (MSB) (Except I²S mode)
tSYD2
−70
BICKA “↓” to SDTOA
tBSD2
−70
SDTIA Hold Time
tSDH2
50
SDTIA Setup Time
tSDS2
50
SYNCA Duty Cycle
dSYC2
-
typ
8
1/(16fs2)
1/(32fs2)
50
0.5 x tBCK2
0.5 x tBCK2
-
-
-
-
tBCK2
-
-
-
-
-
50
max
Units
-
kHz
-
ns
-
ns
-
%
0.5 x tBCK2 + 40 ns
0.5 x tBCK2 + 40 ns
70
ns
70
ns
-
ns
-
ns
-
ns
40
ns
70
ns
70
ns
-
ns
-
ns
-
%
Note 46. MSBSA, BCKPA bits = “00” or “11”.
Note 47. MSBSA, BCKPA bits = “01” or “10”.
MS0666-E-02
- 22 -
2010/06