DS540 Datasheet, PDF (31/45 Pages) Xilinx, Inc – Supports PCIe access to PLB space

LogiCORE IP PLBv46 RC/EP Bridge for PCI Express (v4.07.a)
Table 16: Response of PLBv46_PCIe bridge Slave Side to Abnormal TermInations (Cont’d)
Mem Read
UR returned ⁽¹⁾
SUR interrupt asserted.
Arbitrary data returned on PLB bus.
MRdErr asserted on PLB bus.
Mem Read
Completion timeout occurs ⁽¹⁾
SCT interrupt asserted.
Arbitrary data returned on PLB bus.
MRdErr asserted on PLB bus.
1. When non-posted requests are repeated, interrupts for all attempts are asserted (except for config Read).
2. Completion status of CRS causes a retry of the configuration read or write request.
3. MWrErr was removed from the Bridge Response for Config Writes and I/O Writes because the Slave IPIF does not support
asserting MWrErr on singles when configured with buffers.
4. The SW should not read or write to a bus number greater than the value it sets in the subordinate register at enumeration time;
however, we do specify the bridge behavior if this violation occurs. The bridge does not stop the SW from performing transactions
not allowed by spec.
5. The behavior for Cfg writes is the same as I/O writes. Because I/O writes are non-posted and MemWr are posted, their behaviors
are inherently different.
Master Side Abnormal Conditions
The Master Bridge detects abnormal conditions by first checking for Invalid Requests (for example, message, I/O,
configuration, other...). If the request is valid the Master Bridge then checks for a Bar Match. If the Bar Match is
valid, then the Master Bridge checks the transaction layer packet header for the Error Poison bit. In the case the
Master Bridge detects an invalid request, the Bridge does not check for Bar Match or Error Poison and finish
processing the Invalid Request. The same is true in the case when the Master Bridge detects a invalid Bar Match.
The Bridge does not check for Error Poison and finish processing the invalid Bar Match.
No BAR Match
This request is initiated by the remote requester and received by the PLBv46 Bridge. Because this request does not
fall into one of the three PCI BARs, the request is discarded, then an Unsupported Request (UR) completion packet
is sent if the request was Non Posted.
BAR Match – Invalid Request
This request is initiated by the remote requester and received by the PLBv46 Bridge and falls into one of the three
PCI BARs. This request is not supported by the Master Bridge, such as I/O requests or address routed Messages,
therefore the request is discarded and an Unsupported Request (UR) completion packet is sent if the request was
Non Posted. In this case, an address routed Message is returned and the Master Unsupported Request (MUR)
interrupt is set. If an I/O request is received, no Master Unsupported Request (MUR) interrupt is set.
PLB Master Timeout
When the PLB Master receives a PLB Timeout, the request is discarded and the Master Completer Abort (MCA)
interrupt is issued to the Bridge Interrupt Status register. If the request was non-posted, the Master Bridge responds
by sending a completion (Cpl) with the Completion Status = Completer Abort to the remote requester.
PLB Master Error
When a remote requester performs a read request from the PLBv46 Bridge and the addressed Slave on the PLB
responds with a PLB_MRdErr, the Master Bridge responds by sending a completion (Cpl) with the Completion
Status = Completer Abort to the remote requester.
DS540 June 22, 2011
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Product Specification