DS540 Datasheet, PDF (16/45 Pages) Xilinx, Inc – Supports PCIe access to PLB space

LogiCORE IP PLBv46 RC/EP Bridge for PCI Express (v4.07.a)
PLB Base Address Translation Configuration Registers
The PLB Base Address Translation Configuration Registers and their offsets are shown in Table 5 and the register
bits are described in Table 6. This set of registers can be used in two configurations based on the top level parameter
C_IPIFBAR_AS_n. When the BAR is set to a 32-bit address space then the translation vector should be placed into
the IPIFBAR2PCIBAR_nL register where n is the BAR number. When the BAR is set to a 64-bit address space then
the translation’s most significant 32 bits are written into the IPIFBAR2PCIBAR_nU and the least significant 32 bits
are written into IPIFBAR2PCIBAR_nL. When C_INCLUDE_BAR_OFFSET_REG = 1 these registers can be
dynamically configured by software.
Table 5: PLB Base Address Translation Configuration Registers
Offset
Bits
Register Nmemonic
0x000
0-31
IPIFBAR2PCIBAR_0U
0x004
0-31
IPIFBAR2PCIBAR_0L
0x008
0-31
IPIFBAR2PCIBAR_1U
0x00C
0-31
IPIFBAR2PCIBAR_1L
0x010
0-31
IPIFBAR2PCIBAR_2U
0x014
0-31
IPIFBAR2PCIBAR_2L
0x018
0-31
IPIFBAR2PCIBAR_3U
0x01C
0-31
IPIFBAR2PCIBAR_3L
0x020
0-31
IPIFBAR2PCIBAR_4U
0x024
0-31
IPIFBAR2PCIBAR_4L
0x028
0-31
IPIFBAR2PCIBAR_5U
0x02C
0-31
IPIFBAR2PCIBAR_5L
Table 6: PLB Base Address Translation Configuration Register Bit Definitions
Bits Name
Core
Access
Reset Value
Description
0-31 Lower
R/W
Address
if (C_IPIFBAR_AS_0 = 1) then
reset value = C_IPIFBAR2PCIBAR_0(32 to 63)
if (C_IPIFBAR_AS_0 = 0) then
reset value = C_IPIFBAR2PCIBAR_0(0 to 31)
Lower Address: To create the PCIe
address, this is the value substituted
for the least significant 32 bits of the
PLB address.
0-31
Upper
Address
R/W
(if 64-bit
address)
if (C_IPIFBAR_AS_0 = 1) then
reset value = C_IPIFBAR2PCIBAR_0(0 to 31)
if (C_IPIFBAR_AS_0 = 0) then
reset value = 0x00000000
Upper Address: To create the PCIe
address, this is the value substituted
for the most significant 32 bits of the
PLB address.
0-31 Lower
R/W
Address
if (C_IPIFBAR_AS_1 = 1) then
reset value = C_IPIFBAR2PCIBAR_1(32 to 63)
if (C_IPIFBAR_AS_1 = 0) then
reset value = C_IPIFBAR2PCIBAR_1(0 to 31)
Lower Address: To create the PCIe
address, this is the value substituted
for the least significant 32 bits of the
PLB address.
DS540 June 22, 2011
www.xilinx.com
16
Product Specification