English
Language : 

DS540 Datasheet, PDF (17/45 Pages) Xilinx, Inc – Supports PCIe access to PLB space
LogiCORE IP PLBv46 RC/EP Bridge for PCI Express (v4.07.a)
Table 6: PLB Base Address Translation Configuration Register Bit Definitions (Cont’d)
Bits Name
Core
Access
Reset Value
Description
0-31
Upper
Address
R/W
(if 64-bit
address)
if (C_IPIFBAR_AS_1 = 1) then
reset value = C_IPIFBAR2PCIBAR_1(0 to 31)
if (C_IPIFBAR_AS_1 = 0) then
reset value = 0x00000000
Upper Address: To create the PCIe
address, this is the value substituted
for the most significant 32 bits of the
PLB address.
0-31 Lower
R/W
Address
if(C_IPIFBAR_AS_2 = 1) then
reset value = C_IPIFBAR2PCIBAR_2(32 to 63)
if (C_IPIFBAR_AS_2 = 0) then
reset value = C_IPIFBAR2PCIBAR_2(0 to 31)
Lower Address: To create the PCIe
address, this is the value substituted
for the least significant 32 bits of the
PLB address.
0-31
Upper
Address
R/W
(if 64-bit
address)
if (C_IPIFBAR_AS_2 = 1) then
reset value = C_IPIFBAR2PCIBAR_2(0 to 31)
if (C_IPIFBAR_AS_2 = 0) then
reset value = 0x00000000
Upper Address: To create the PCIe
address, this is the value substituted
for the most significant 32 bits of the
PLB address.
0-31 Lower
R/W
Address
if (C_IPIFBAR_AS_3 = 1) then
reset value = C_IPIFBAR2PCIBAR_3(32 to 63)
if (C_IPIFBAR_AS_3 = 0) then
reset value = C_IPIFBAR2PCIBAR_3(0 to 31)
Lower Address: To create the PCIe
address, this is the value substituted
for the least significant 32 bits of the
PLB address (bits 32 to 63).
0-31
Upper
Address
R/W
(if 64-bit
address)
if (C_IPIFBAR_AS_3 = 1) then
reset value = C_IPIFBAR2PCIBAR_3(0 to 31)
if (C_IPIFBAR_AS_3 = 0) then
reset value = 0x00000000
Upper Address: To create the PCIe
address, this is the value substituted
for the most significant 32 bits of the
PLB address.
0-31 Lower
R/W
Address
if (C_IPIFBAR_AS_4 = 1) then
reset value = C_IPIFBAR2PCIBAR_4(32 to 63)
if (C_IPIFBAR_AS_4 = 0) then
reset value = C_IPIFBAR2PCIBAR_4(0 to 31)
Lower Address: To create the PCIe
address, this is the value substituted
for the least significant 32 bits of the
PLB address.
0-31
Upper
Address
R/W
(if 64-bit
address)
if (C_IPIFBAR_AS_4 = 1) then
reset value = C_IPIFBAR2PCIBAR_4(0 to 31)
if (C_IPIFBAR_AS_4 = 0) then
reset value = 0x00000000
Upper Address: To create the PCIe
address, this is the value substituted
for the most significant 32 bits of the
PLB address.
0-31 Lower
R/W
Address
if (C_IPIFBAR_AS_5 = 1) then
reset value = C_IPIFBAR2PCIBAR_5(32 to 63)
if (C_IPIFBAR_AS_5 = 0) then
reset value = C_IPIFBAR2PCIBAR_5(0 to 31)
Lower Address: To create the PCIe
address, this is the value substituted
for the least significant 32 bits of the
PLB address.
0-31
Upper
Address
R/W
(if 64-bit
address)
if (C_IPIFBAR_AS_5 = 1) then
reset value = C_IPIFBAR2PCIBAR_5(0 to 31)
if (C_IPIFBAR_AS_5 = 0) then
reset value = 0x00000000
Upper Address: To create the PCIe
address, this is the value substituted
for the most significant 32 bits of the
PLB address.
DS540 June 22, 2011
www.xilinx.com
17
Product Specification